arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new dtsi

The TI K3 J721E SoCs have multiple programmable remote processors like
R5F, C6x, C7x etc. The TI SDKs for J721E SoCs offer sample firmwares
which could be run on these cores to demonstrate an "echo" IPC test.
Those firmware require certain memory carveouts to be reserved from
system memory, timers to be reserved, and certain mailbox configurations
for interrupt based messaging. These configurations could be different
for a different firmware.

While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-26-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 3a7813c8770fbad5ea32aa35203520c944799c85..352fb60e6ce83f64bd0a21a23bb11dbff160744c 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -62,110 +62,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a5000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a5100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               /* Carveout locations are flipped due to caching */
-               c66_1_dma_memory_region: memory@a6000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c66_0_memory_region: memory@a6100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               /* Carveout locations are flipped due to caching */
-               c66_0_dma_memory_region: memory@a7000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c66_1_memory_region: memory@a7100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_0_dma_memory_region: memory@a8000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_0_memory_region: memory@a8100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@aa000000 {
-                       reg = <0x00 0xaa000000 0x00 0x01c00000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 
        gpio_keys: gpio-keys {
@@ -867,178 +763,4 @@
        status = "disabled";
 };
 
-&mailbox0_cluster0 {
-       status = "okay";
-       interrupts = <436>;
-
-       mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster1 {
-       status = "okay";
-       interrupts = <432>;
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster2 {
-       status = "okay";
-       interrupts = <428>;
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster3 {
-       status = "okay";
-       interrupts = <424>;
-
-       mbox_c66_0: mbox-c66-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_c66_1: mbox-c66-1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-       interrupts = <420>;
-
-       mbox_c71_0: mbox-c71-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
-       status = "reserved";
-};
-
-&main_timer1 {
-       status = "reserved";
-};
-
-&main_timer2 {
-       status = "reserved";
-};
-
-&main_timer12 {
-       status = "reserved";
-};
-
-&main_timer13 {
-       status = "reserved";
-};
-
-&main_timer14 {
-       status = "reserved";
-};
-
-&main_timer15 {
-       status = "reserved";
-};
-
-&mcu_r5fss0 {
-       status = "okay";
-};
-
-&mcu_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
-       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
-                       <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
-       memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
-                       <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-&main_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-&main_r5fss1_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-};
-
-&c66_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
-       memory-region = <&c66_0_dma_memory_region>,
-                       <&c66_0_memory_region>;
-};
-
-&c66_1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
-       memory-region = <&c66_1_dma_memory_region>,
-                       <&c66_1_memory_region>;
-};
-
-&c71_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
-       memory-region = <&c71_0_dma_memory_region>,
-                       <&c71_0_memory_region>;
-};
+#include "k3-j721e-ti-ipc-firmware.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 37bc33f2cc26f8b671716f45c0d2b68496b43873..5e5784ef6f8585557e5993bb5eb6cdac0b4d946b 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -59,110 +59,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a5000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a5100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               /* Carveout locations are flipped due to caching */
-               c66_1_dma_memory_region: memory@a6000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c66_0_memory_region: memory@a6100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               /* Carveout locations are flipped due to caching */
-               c66_0_dma_memory_region: memory@a7000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c66_1_memory_region: memory@a7100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_0_dma_memory_region: memory@a8000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_0_memory_region: memory@a8100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@aa000000 {
-                       reg = <0x00 0xaa000000 0x00 0x01c00000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 
        vusb_main: fixedregulator-vusb-main5v0 {
@@ -1281,178 +1177,4 @@
        status = "disabled";
 };
 
-&mailbox0_cluster0 {
-       status = "okay";
-       interrupts = <436>;
-
-       mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster1 {
-       status = "okay";
-       interrupts = <432>;
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster2 {
-       status = "okay";
-       interrupts = <428>;
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster3 {
-       status = "okay";
-       interrupts = <424>;
-
-       mbox_c66_0: mbox-c66-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_c66_1: mbox-c66-1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-       interrupts = <420>;
-
-       mbox_c71_0: mbox-c71-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-};
-
-&mcu_r5fss0 {
-       status = "okay";
-};
-
-&mcu_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
-       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
-                       <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
-       memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
-                       <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
-       status = "reserved";
-};
-
-&main_timer1 {
-       status = "reserved";
-};
-
-&main_timer2 {
-       status = "reserved";
-};
-
-&main_timer12 {
-       status = "reserved";
-};
-
-&main_timer13 {
-       status = "reserved";
-};
-
-&main_timer14 {
-       status = "reserved";
-};
-
-&main_timer15 {
-       status = "reserved";
-};
-
-&main_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-};
-
-&c66_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
-       memory-region = <&c66_0_dma_memory_region>,
-                       <&c66_0_memory_region>;
-};
-
-&c66_1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
-       memory-region = <&c66_1_dma_memory_region>,
-                       <&c66_1_memory_region>;
-};
-
-&c71_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
-       memory-region = <&c71_0_dma_memory_region>,
-                       <&c71_0_memory_region>;
-};
+#include "k3-j721e-ti-ipc-firmware.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index 06388f28d122b8f1b8a86ed099c523749bbfbbfb..c8073ee634b7fdfdacf335c842a4a53df48a6673 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -40,108 +40,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a5000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a5100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c66_1_dma_memory_region: memory@a6000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c66_0_memory_region: memory@a6100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c66_0_dma_memory_region: memory@a7000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c66_1_memory_region: memory@a7100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_0_dma_memory_region: memory@a8000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_0_memory_region: memory@a8100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@aa000000 {
-                       reg = <0x00 0xaa000000 0x00 0x01c00000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 };
 
@@ -484,178 +382,4 @@
        };
 };
 
-&mailbox0_cluster0 {
-       status = "okay";
-       interrupts = <436>;
-
-       mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster1 {
-       status = "okay";
-       interrupts = <432>;
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster2 {
-       status = "okay";
-       interrupts = <428>;
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster3 {
-       status = "okay";
-       interrupts = <424>;
-
-       mbox_c66_0: mbox-c66-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_c66_1: mbox-c66-1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-       interrupts = <420>;
-
-       mbox_c71_0: mbox-c71-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-};
-
-&mcu_r5fss0 {
-       status = "okay";
-};
-
-&mcu_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
-       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
-                       <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
-       memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
-                       <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
-       status = "okay";
-       ti,cluster-mode = <0>;
-};
-
-&main_r5fss1 {
-       status = "okay";
-       ti,cluster-mode = <0>;
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
-       status = "reserved";
-};
-
-&main_timer1 {
-       status = "reserved";
-};
-
-&main_timer2 {
-       status = "reserved";
-};
-
-&main_timer12 {
-       status = "reserved";
-};
-
-&main_timer13 {
-       status = "reserved";
-};
-
-&main_timer14 {
-       status = "reserved";
-};
-
-&main_timer15 {
-       status = "reserved";
-};
-
-&main_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-};
-
-&c66_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
-       memory-region = <&c66_0_dma_memory_region>,
-                       <&c66_0_memory_region>;
-};
-
-&c66_1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
-       memory-region = <&c66_1_dma_memory_region>,
-                       <&c66_1_memory_region>;
-};
-
-&c71_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
-       memory-region = <&c71_0_dma_memory_region>,
-                       <&c71_0_memory_region>;
-};
+#include "k3-j721e-ti-ipc-firmware.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
new file mode 100644 (file)
index 0000000..40c6cc9
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J721E SoCs
+ *
+ * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+       mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa1000000 0x00 0x100000>;
+               no-map;
+       };
+
+       mcu_r5fss0_core1_memory_region: memory@a1100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa1100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss0_core0_dma_memory_region: memory@a2000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa2000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss0_core0_memory_region: memory@a2100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa2100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss0_core1_dma_memory_region: memory@a3000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa3000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss0_core1_memory_region: memory@a3100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa3100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss1_core0_dma_memory_region: memory@a4000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa4000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss1_core0_memory_region: memory@a4100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa4100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss1_core1_dma_memory_region: memory@a5000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa5000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss1_core1_memory_region: memory@a5100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa5100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       /* Carveout locations are flipped due to caching */
+       c66_1_dma_memory_region: memory@a6000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa6000000 0x00 0x100000>;
+               no-map;
+       };
+
+       c66_0_memory_region: memory@a6100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa6100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       /* Carveout locations are flipped due to caching */
+       c66_0_dma_memory_region: memory@a7000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa7000000 0x00 0x100000>;
+               no-map;
+       };
+
+       c66_1_memory_region: memory@a7100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa7100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       c71_0_dma_memory_region: memory@a8000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa8000000 0x00 0x100000>;
+               no-map;
+       };
+
+       c71_0_memory_region: memory@a8100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa8100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       rtos_ipc_memory_region: memory@aa000000 {
+               reg = <0x00 0xaa000000 0x00 0x01c00000>;
+               alignment = <0x1000>;
+               no-map;
+       };
+};
+
+&mailbox0_cluster0 {
+       status = "okay";
+       interrupts = <436>;
+
+       mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster1 {
+       status = "okay";
+       interrupts = <432>;
+
+       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster2 {
+       status = "okay";
+       interrupts = <428>;
+
+       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster3 {
+       status = "okay";
+       interrupts = <424>;
+
+       mbox_c66_0: mbox-c66-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_c66_1: mbox-c66-1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster4 {
+       status = "okay";
+       interrupts = <420>;
+
+       mbox_c71_0: mbox-c71-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+       status = "reserved";
+};
+
+&main_timer1 {
+       status = "reserved";
+};
+
+&main_timer2 {
+       status = "reserved";
+};
+
+&main_timer12 {
+       status = "reserved";
+};
+
+&main_timer13 {
+       status = "reserved";
+};
+
+&main_timer14 {
+       status = "reserved";
+};
+
+&main_timer15 {
+       status = "reserved";
+};
+
+&mcu_r5fss0 {
+       status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+                       <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+       memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+                       <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0 {
+       status = "okay";
+       ti,cluster-mode = <0>;
+};
+
+&main_r5fss0_core0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+       memory-region = <&main_r5fss0_core0_dma_memory_region>,
+                       <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+       memory-region = <&main_r5fss0_core1_dma_memory_region>,
+                       <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1 {
+       status = "okay";
+       ti,cluster-mode = <0>;
+};
+
+&main_r5fss1_core0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+       memory-region = <&main_r5fss1_core0_dma_memory_region>,
+                       <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+       memory-region = <&main_r5fss1_core1_dma_memory_region>,
+                       <&main_r5fss1_core1_memory_region>;
+};
+
+&c66_0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
+       memory-region = <&c66_0_dma_memory_region>,
+                       <&c66_0_memory_region>;
+};
+
+&c66_1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
+       memory-region = <&c66_1_dma_memory_region>,
+                       <&c66_1_memory_region>;
+};
+
+&c71_0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+       memory-region = <&c71_0_dma_memory_region>,
+                       <&c71_0_memory_region>;
+};