]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amd/display: fix s2idle entry for DCN3.5+
authorHamza Mahfooz <hamza.mahfooz@amd.com>
Tue, 6 Aug 2024 13:55:55 +0000 (09:55 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 29 Aug 2024 15:35:43 +0000 (17:35 +0200)
commit f6098641d3e1e4d4052ff9378857c831f9675f6b upstream.

To be able to get to the lowest power state when suspending systems with
DCN3.5+, we must be in IPS before the display hardware is put into
D3cold. So, to ensure that the system always reaches the lowest power
state while suspending, force systems that support IPS to enter idle
optimizations before entering D3cold.

Reviewed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 237193e21b29d4aa0617ffeea3d6f49e72999708)
Cc: stable@vger.kernel.org # 6.10+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index 836bf9ba620d199c12304db5ac6740bb50506be5..6a0f8e704b11ce4d0c805350f225172d951565e4 100644 (file)
@@ -2724,6 +2724,9 @@ static int dm_suspend(void *handle)
 
        hpd_rx_irq_work_suspend(dm);
 
+       if (adev->dm.dc->caps.ips_support)
+               dc_allow_idle_optimizations(adev->dm.dc, true);
+
        dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
        dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3);