PR target/65604

	* gcc.target/mips/div-delay.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232986 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 150ebc803ac489e0df2148042e3c114125da0444..6d6b8d877a6faa4deef34fdf03878a1b82f5255f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-29  Steve Ellcey  <sellcey@imgtec.com>
+
+       PR target/65604
+       * gcc.target/mips/div-delay.c: New test.
+
 2016-01-29  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/69551

diff --git a/gcc/testsuite/gcc.target/mips/div-delay.c b/gcc/testsuite/gcc.target/mips/div-delay.c
new file mode 100644 (file)
index 0000000..bdeb125
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/div-delay.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=mips1 -fno-delayed-branch" } */
+/* { dg-final { scan-assembler "\tbne\t.*\tnop" } } */
+
+/* Ensure that mips1 does not put anything in the delay slot of the bne
+   instruction when checking for divide by zero.  mips2+ systems use teq
+   instead of bne and teq has no delay slot.  */
+
+NOCOMPRESSION int
+foo (int a, int b)
+{
+  return a / b;
+}