pci-add-acs-quirk-for-qualcomm-qdf2400-and-qdf2432.patch
watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch
platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch
-x86-msr-index.h-define-atom-specific-core-ratio-msr-locations.patch
-tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch
-tools-power-turbostat-dump-atom-p-states-correctly.patch
x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch
x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch
usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch
+++ /dev/null
-From foo@baz Mon Apr 10 18:08:16 CEST 2017
-From: alexander.levin@verizon.com
-Date: Tue, 4 Apr 2017 19:32:36 +0000
-Subject: tools/power turbostat: decode Baytrail CC6 and MC6 demotion configuration
-To: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
-Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>
-Message-ID: <20170404193158.19041-93-alexander.levin@verizon.com>
-
-From: Len Brown <len.brown@intel.com>
-
-[ Upstream commit 71616c8e936a6dd541f0627d7bf4ff09971d8ccb ]
-
-with --debug, see:
-
-cpu0: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x00000000 (DISable-CC6-Demotion)
-cpu0: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x00000000 (DISable-MC6-Demotion)
-
-Note that the hardware default is to enable demotion,
-and Linux started clearing these registers in 3.17.
-
-Signed-off-by: Len Brown <len.brown@intel.com>
-Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- tools/power/x86/turbostat/turbostat.c | 42 ++++++++++++++++++++++++++++++++++
- 1 file changed, 42 insertions(+)
-
---- a/tools/power/x86/turbostat/turbostat.c
-+++ b/tools/power/x86/turbostat/turbostat.c
-@@ -3097,6 +3097,27 @@ int has_snb_msrs(unsigned int family, un
- }
-
- /*
-+ * SLV client has supporet for unique MSRs:
-+ *
-+ * MSR_CC6_DEMOTION_POLICY_CONFIG
-+ * MSR_MC6_DEMOTION_POLICY_CONFIG
-+ */
-+
-+int has_slv_msrs(unsigned int family, unsigned int model)
-+{
-+ if (!genuine_intel)
-+ return 0;
-+
-+ switch (model) {
-+ case INTEL_FAM6_ATOM_SILVERMONT1:
-+ case INTEL_FAM6_ATOM_MERRIFIELD:
-+ case INTEL_FAM6_ATOM_MOOREFIELD:
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-+/*
- * HSW adds support for additional MSRs:
- *
- * MSR_PKG_C8_RESIDENCY 0x00000630
-@@ -3327,6 +3348,24 @@ void decode_misc_pwr_mgmt_msr(void)
- msr & (1 << 1) ? "EN" : "DIS",
- msr & (1 << 8) ? "EN" : "DIS");
- }
-+/*
-+ * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
-+ *
-+ * This MSRs are present on Silvermont processors,
-+ * Intel Atom processor E3000 series (Baytrail), and friends.
-+ */
-+void decode_c6_demotion_policy_msr(void)
-+{
-+ unsigned long long msr;
-+
-+ if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
-+ fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
-+ base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
-+
-+ if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
-+ fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
-+ base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
-+}
-
- void process_cpuid()
- {
-@@ -3509,6 +3548,9 @@ void process_cpuid()
- if (debug)
- decode_misc_pwr_mgmt_msr();
-
-+ if (debug && has_slv_msrs(family, model))
-+ decode_c6_demotion_policy_msr();
-+
- rapl_probe(family, model);
- perf_limit_reasons_probe(family, model);
-
+++ /dev/null
-From foo@baz Mon Apr 10 18:08:16 CEST 2017
-From: alexander.levin@verizon.com
-Date: Tue, 4 Apr 2017 19:32:37 +0000
-Subject: tools/power turbostat: dump Atom P-states correctly
-To: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
-Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>
-Message-ID: <20170404193158.19041-94-alexander.levin@verizon.com>
-
-From: Len Brown <len.brown@intel.com>
-
-[ Upstream commit 0f7887c49b0c454aef9936a6eadabe1c91b5af55 ]
-
-Turbostat dumps MSR_TURBO_RATIO_LIMIT on Core Architecture.
-But Atom Architecture uses MSR_ATOM_CORE_RATIOS and
-MSR_ATOM_CORE_TURBO_RATIOS.
-
-Signed-off-by: Len Brown <len.brown@intel.com>
-Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- tools/power/x86/turbostat/turbostat.c | 103 +++++++++++++++++++++++++++-------
- 1 file changed, 82 insertions(+), 21 deletions(-)
-
---- a/tools/power/x86/turbostat/turbostat.c
-+++ b/tools/power/x86/turbostat/turbostat.c
-@@ -1598,6 +1598,54 @@ dump_nhm_turbo_ratio_limits(void)
- }
-
- static void
-+dump_atom_turbo_ratio_limits(void)
-+{
-+ unsigned long long msr;
-+ unsigned int ratio;
-+
-+ get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
-+ fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
-+
-+ ratio = (msr >> 0) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 8) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 16) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
-+ fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
-+
-+ ratio = (msr >> 24) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 16) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 8) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 0) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
-+ ratio, bclk, ratio * bclk);
-+}
-+
-+static void
- dump_knl_turbo_ratio_limits(void)
- {
- const unsigned int buckets_no = 7;
-@@ -2368,8 +2416,32 @@ int probe_nhm_msrs(unsigned int family,
- has_base_hz = 1;
- return 1;
- }
-+/*
-+ * SLV client has supporet for unique MSRs:
-+ *
-+ * MSR_CC6_DEMOTION_POLICY_CONFIG
-+ * MSR_MC6_DEMOTION_POLICY_CONFIG
-+ */
-+
-+int has_slv_msrs(unsigned int family, unsigned int model)
-+{
-+ if (!genuine_intel)
-+ return 0;
-+
-+ switch (model) {
-+ case INTEL_FAM6_ATOM_SILVERMONT1:
-+ case INTEL_FAM6_ATOM_MERRIFIELD:
-+ case INTEL_FAM6_ATOM_MOOREFIELD:
-+ return 1;
-+ }
-+ return 0;
-+}
-+
- int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
- {
-+ if (has_slv_msrs(family, model))
-+ return 0;
-+
- switch (model) {
- /* Nehalem compatible, but do not include turbo-ratio limit support */
- case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
-@@ -2381,6 +2453,13 @@ int has_nhm_turbo_ratio_limit(unsigned i
- return 1;
- }
- }
-+int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
-+{
-+ if (has_slv_msrs(family, model))
-+ return 1;
-+
-+ return 0;
-+}
- int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
- {
- if (!genuine_intel)
-@@ -2478,6 +2557,9 @@ dump_cstate_pstate_config_info(unsigned
- if (has_nhm_turbo_ratio_limit(family, model))
- dump_nhm_turbo_ratio_limits();
-
-+ if (has_atom_turbo_ratio_limit(family, model))
-+ dump_atom_turbo_ratio_limits();
-+
- if (has_knl_turbo_ratio_limit(family, model))
- dump_knl_turbo_ratio_limits();
-
-@@ -3094,27 +3176,6 @@ int has_snb_msrs(unsigned int family, un
- return 1;
- }
- return 0;
--}
--
--/*
-- * SLV client has supporet for unique MSRs:
-- *
-- * MSR_CC6_DEMOTION_POLICY_CONFIG
-- * MSR_MC6_DEMOTION_POLICY_CONFIG
-- */
--
--int has_slv_msrs(unsigned int family, unsigned int model)
--{
-- if (!genuine_intel)
-- return 0;
--
-- switch (model) {
-- case INTEL_FAM6_ATOM_SILVERMONT1:
-- case INTEL_FAM6_ATOM_MERRIFIELD:
-- case INTEL_FAM6_ATOM_MOOREFIELD:
-- return 1;
-- }
-- return 0;
- }
-
- /*
+++ /dev/null
-From 8a34fd0226eaae64d61ff9a113d276e28acb6b5c Mon Sep 17 00:00:00 2001
-From: Len Brown <len.brown@intel.com>
-Date: Thu, 12 Jan 2017 23:22:28 -0500
-Subject: x86 msr-index.h: Define Atom specific core ratio MSR locations
-
-From: Len Brown <len.brown@intel.com>
-
-commit 8a34fd0226eaae64d61ff9a113d276e28acb6b5c upstream.
-
-These MSRs are currently used by the intel_pstate driver,
-using a local definition.
-
-Cc: x86@kernel.org
-Signed-off-by: Len Brown <len.brown@intel.com>
-Cc: Andre Tomt <andre@tomt.net>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- arch/x86/include/asm/msr-index.h | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/x86/include/asm/msr-index.h
-+++ b/arch/x86/include/asm/msr-index.h
-@@ -207,6 +207,12 @@
- #define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668
- #define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669
-
-+#define MSR_ATOM_CORE_RATIOS 0x0000066a
-+#define MSR_ATOM_CORE_VIDS 0x0000066b
-+#define MSR_ATOM_CORE_TURBO_RATIOS 0x0000066c
-+#define MSR_ATOM_CORE_TURBO_VIDS 0x0000066d
-+
-+
- #define MSR_CORE_PERF_LIMIT_REASONS 0x00000690
- #define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0
- #define MSR_RING_PERF_LIMIT_REASONS 0x000006B1
watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch
platform-x86-asus-wmi-set-specified-xusb2pr-value-for-x550lb.patch
platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch
-x86-msr-index.h-define-atom-specific-core-ratio-msr-locations.patch
-tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch
-tools-power-turbostat-dump-atom-p-states-correctly.patch
x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch
x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch
usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch
+++ /dev/null
-From foo@baz Mon Apr 10 17:43:56 CEST 2017
-From: alexander.levin@verizon.com
-Date: Tue, 4 Apr 2017 19:32:36 +0000
-Subject: tools/power turbostat: decode Baytrail CC6 and MC6 demotion configuration
-To: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
-Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>
-Message-ID: <20170404193158.19041-93-alexander.levin@verizon.com>
-
-From: Len Brown <len.brown@intel.com>
-
-[ Upstream commit 71616c8e936a6dd541f0627d7bf4ff09971d8ccb ]
-
-with --debug, see:
-
-cpu0: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x00000000 (DISable-CC6-Demotion)
-cpu0: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x00000000 (DISable-MC6-Demotion)
-
-Note that the hardware default is to enable demotion,
-and Linux started clearing these registers in 3.17.
-
-Signed-off-by: Len Brown <len.brown@intel.com>
-Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- tools/power/x86/turbostat/turbostat.c | 42 ++++++++++++++++++++++++++++++++++
- 1 file changed, 42 insertions(+)
-
---- a/tools/power/x86/turbostat/turbostat.c
-+++ b/tools/power/x86/turbostat/turbostat.c
-@@ -2951,6 +2951,27 @@ int has_snb_msrs(unsigned int family, un
- }
-
- /*
-+ * SLV client has supporet for unique MSRs:
-+ *
-+ * MSR_CC6_DEMOTION_POLICY_CONFIG
-+ * MSR_MC6_DEMOTION_POLICY_CONFIG
-+ */
-+
-+int has_slv_msrs(unsigned int family, unsigned int model)
-+{
-+ if (!genuine_intel)
-+ return 0;
-+
-+ switch (model) {
-+ case INTEL_FAM6_ATOM_SILVERMONT1:
-+ case INTEL_FAM6_ATOM_MERRIFIELD:
-+ case INTEL_FAM6_ATOM_MOOREFIELD:
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-+/*
- * HSW adds support for additional MSRs:
- *
- * MSR_PKG_C8_RESIDENCY 0x00000630
-@@ -3179,6 +3200,24 @@ void decode_misc_pwr_mgmt_msr(void)
- msr & (1 << 0) ? "DIS" : "EN",
- msr & (1 << 1) ? "EN" : "DIS");
- }
-+/*
-+ * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
-+ *
-+ * This MSRs are present on Silvermont processors,
-+ * Intel Atom processor E3000 series (Baytrail), and friends.
-+ */
-+void decode_c6_demotion_policy_msr(void)
-+{
-+ unsigned long long msr;
-+
-+ if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
-+ fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
-+ base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
-+
-+ if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
-+ fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
-+ base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
-+}
-
- void process_cpuid()
- {
-@@ -3360,6 +3399,9 @@ void process_cpuid()
- if (debug)
- decode_misc_pwr_mgmt_msr();
-
-+ if (debug && has_slv_msrs(family, model))
-+ decode_c6_demotion_policy_msr();
-+
- rapl_probe(family, model);
- perf_limit_reasons_probe(family, model);
-
+++ /dev/null
-From foo@baz Mon Apr 10 17:43:56 CEST 2017
-From: alexander.levin@verizon.com
-Date: Tue, 4 Apr 2017 19:32:37 +0000
-Subject: tools/power turbostat: dump Atom P-states correctly
-To: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
-Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>
-Message-ID: <20170404193158.19041-94-alexander.levin@verizon.com>
-
-From: Len Brown <len.brown@intel.com>
-
-[ Upstream commit 0f7887c49b0c454aef9936a6eadabe1c91b5af55 ]
-
-Turbostat dumps MSR_TURBO_RATIO_LIMIT on Core Architecture.
-But Atom Architecture uses MSR_ATOM_CORE_RATIOS and
-MSR_ATOM_CORE_TURBO_RATIOS.
-
-Signed-off-by: Len Brown <len.brown@intel.com>
-Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- tools/power/x86/turbostat/turbostat.c | 103 +++++++++++++++++++++++++++-------
- 1 file changed, 82 insertions(+), 21 deletions(-)
-
---- a/tools/power/x86/turbostat/turbostat.c
-+++ b/tools/power/x86/turbostat/turbostat.c
-@@ -1470,6 +1470,54 @@ dump_nhm_turbo_ratio_limits(void)
- }
-
- static void
-+dump_atom_turbo_ratio_limits(void)
-+{
-+ unsigned long long msr;
-+ unsigned int ratio;
-+
-+ get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
-+ fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
-+
-+ ratio = (msr >> 0) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 8) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 16) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
-+ fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
-+
-+ ratio = (msr >> 24) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 16) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 8) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
-+ ratio, bclk, ratio * bclk);
-+
-+ ratio = (msr >> 0) & 0x3F;
-+ if (ratio)
-+ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
-+ ratio, bclk, ratio * bclk);
-+}
-+
-+static void
- dump_knl_turbo_ratio_limits(void)
- {
- const unsigned int buckets_no = 7;
-@@ -2230,8 +2278,32 @@ int probe_nhm_msrs(unsigned int family,
- has_base_hz = 1;
- return 1;
- }
-+/*
-+ * SLV client has supporet for unique MSRs:
-+ *
-+ * MSR_CC6_DEMOTION_POLICY_CONFIG
-+ * MSR_MC6_DEMOTION_POLICY_CONFIG
-+ */
-+
-+int has_slv_msrs(unsigned int family, unsigned int model)
-+{
-+ if (!genuine_intel)
-+ return 0;
-+
-+ switch (model) {
-+ case INTEL_FAM6_ATOM_SILVERMONT1:
-+ case INTEL_FAM6_ATOM_MERRIFIELD:
-+ case INTEL_FAM6_ATOM_MOOREFIELD:
-+ return 1;
-+ }
-+ return 0;
-+}
-+
- int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
- {
-+ if (has_slv_msrs(family, model))
-+ return 0;
-+
- switch (model) {
- /* Nehalem compatible, but do not include turbo-ratio limit support */
- case 0x2E: /* Nehalem-EX Xeon - Beckton */
-@@ -2242,6 +2314,13 @@ int has_nhm_turbo_ratio_limit(unsigned i
- return 1;
- }
- }
-+int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
-+{
-+ if (has_slv_msrs(family, model))
-+ return 1;
-+
-+ return 0;
-+}
- int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
- {
- if (!genuine_intel)
-@@ -2337,6 +2416,9 @@ dump_cstate_pstate_config_info(unsigned
- if (has_nhm_turbo_ratio_limit(family, model))
- dump_nhm_turbo_ratio_limits();
-
-+ if (has_atom_turbo_ratio_limit(family, model))
-+ dump_atom_turbo_ratio_limits();
-+
- if (has_knl_turbo_ratio_limit(family, model))
- dump_knl_turbo_ratio_limits();
-
-@@ -2948,27 +3030,6 @@ int has_snb_msrs(unsigned int family, un
- return 1;
- }
- return 0;
--}
--
--/*
-- * SLV client has supporet for unique MSRs:
-- *
-- * MSR_CC6_DEMOTION_POLICY_CONFIG
-- * MSR_MC6_DEMOTION_POLICY_CONFIG
-- */
--
--int has_slv_msrs(unsigned int family, unsigned int model)
--{
-- if (!genuine_intel)
-- return 0;
--
-- switch (model) {
-- case INTEL_FAM6_ATOM_SILVERMONT1:
-- case INTEL_FAM6_ATOM_MERRIFIELD:
-- case INTEL_FAM6_ATOM_MOOREFIELD:
-- return 1;
-- }
-- return 0;
- }
-
- /*
+++ /dev/null
-From 8a34fd0226eaae64d61ff9a113d276e28acb6b5c Mon Sep 17 00:00:00 2001
-From: Len Brown <len.brown@intel.com>
-Date: Thu, 12 Jan 2017 23:22:28 -0500
-Subject: x86 msr-index.h: Define Atom specific core ratio MSR locations
-
-From: Len Brown <len.brown@intel.com>
-
-commit 8a34fd0226eaae64d61ff9a113d276e28acb6b5c upstream.
-
-These MSRs are currently used by the intel_pstate driver,
-using a local definition.
-
-Cc: x86@kernel.org
-Signed-off-by: Len Brown <len.brown@intel.com>
-Cc: Andre Tomt <andre@tomt.net>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- arch/x86/include/asm/msr-index.h | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/x86/include/asm/msr-index.h
-+++ b/arch/x86/include/asm/msr-index.h
-@@ -203,6 +203,12 @@
- #define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668
- #define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669
-
-+#define MSR_ATOM_CORE_RATIOS 0x0000066a
-+#define MSR_ATOM_CORE_VIDS 0x0000066b
-+#define MSR_ATOM_CORE_TURBO_RATIOS 0x0000066c
-+#define MSR_ATOM_CORE_TURBO_VIDS 0x0000066d
-+
-+
- #define MSR_CORE_PERF_LIMIT_REASONS 0x00000690
- #define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0
- #define MSR_RING_PERF_LIMIT_REASONS 0x000006B1
projects / thirdparty / kernel / stable-queue.git / commitdiff
