]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
generic: net: phy: realtek: select rtl826x phy patch table by chip version
authorCarlo Szelinsky <github@szelinsky.de>
Tue, 9 Jun 2026 19:42:40 +0000 (21:42 +0200)
committerJonas Jelonek <jelonek.jonas@gmail.com>
Tue, 30 Jun 2026 22:13:58 +0000 (00:13 +0200)
The in-tree realtek 5G/10G driver picks the firmware patch table from the
PHY ID (RTL8264 -> rtl8264b.bin). The vendor driver instead picks it from
VEND1 0x104[2:0] (0 = RTL8264B, else RTL8261N-C), independent of PHY ID.

On the S1300WP the RTL8264 dies read 0x104=0xf802 ([2:0]=2), so they need
the RTL8261N-C table; the RTL8264B table leaves the PCS unlocked (0xA600
stuck 0x1000) and config_init fails with -ETIME. Read 0x104[2:0] and load
rtl8261n.bin when non-zero. Boards with such a die must ship rtl8261n.bin.

Fixes: 6369c9e5c799 ("generic: net: phy: realtek: add 5G and 10G PHY support")
Co-authored-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/23947
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
target/linux/generic/pending-6.18/742-net-phy-realtek-add-5G-and-10G-PHY-support.patch
target/linux/realtek/patches-6.18/024-02-v7.1-net-phy-realtek-add-RTL8224-pair-order-support.patch
target/linux/realtek/patches-6.18/024-04-v7.1-net-phy-realtek-add-RTL8224-polarity-support.patch
target/linux/realtek/patches-6.18/030-v7.2-net-phy-realtek-support-MDI-swapping-for-RTL8226-CG.patch
target/linux/realtek/patches-6.18/743-net-realtek-serdes-configuration.patch

index 71b025eefe6828c670447ba61e0d397b6f644ff7..0d6c7f48041f28b8c8d2da23e59b11eac7be3181 100644 (file)
@@ -64,7 +64,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
  #include <linux/string_choices.h>
  #include <net/phy/realtek_phy.h>
  
-@@ -205,10 +207,26 @@
+@@ -205,10 +207,27 @@
  #define RTL_8221B_VM_CG                               0x001cc84a
  #define RTL_8251B                             0x001cc862
  #define RTL_8261C                             0x001cc890
@@ -81,6 +81,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
 +
 +#define RTL826X_VEND1_PKG_MODEL                       0x103
 +#define RTL826X_VEND1_VERSION_ID              0x104
++#define   RTL826X_VEND1_VERSION_ID_VARIANT    GENMASK(2, 0)
 +
 +#define RTL826X_VND2_INER                     0xA424
 +#define   RTL826X_VND2_INER_LINK_STATUS               BIT(4)
@@ -91,7 +92,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
  MODULE_DESCRIPTION("Realtek PHY driver");
  MODULE_AUTHOR("Johnson Leung");
  MODULE_LICENSE("GPL");
-@@ -1993,6 +2011,125 @@ static int rtl8251b_c45_match_phy_device
+@@ -1993,6 +2012,125 @@ static int rtl8251b_c45_match_phy_device
        return rtlgen_is_c45_match(phydev, RTL_8251B, true);
  }
  
@@ -217,14 +218,29 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
  static int rtlgen_resume(struct phy_device *phydev)
  {
        int ret = genphy_resume(phydev);
-@@ -2214,6 +2351,493 @@ static int rtlgen_sfp_config_aneg(struct
+@@ -2214,6 +2352,482 @@ static int rtlgen_sfp_config_aneg(struct
        return 0;
  }
  
++static int rtl826x_patch_db_init(struct phy_device *phydev)
++{
++      int ver;
++
++      ver = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL826X_VEND1_VERSION_ID);
++      if (ver < 0)
++              return ver;
++
++      if (ver & RTL826X_VEND1_VERSION_ID_VARIANT)
++              return rtl8261n_phy_patch_db_init(phydev);
++      else
++              return rtl8264b_phy_patch_db_init(phydev);
++}
++
 +static int rtl826x_probe(struct phy_device *phydev)
 +{
 +      struct device *dev = &phydev->mdio.dev;
 +      struct rtl826x_priv *priv;
++      int ret;
 +
 +      priv = devm_kzalloc(dev, sizeof(struct rtl826x_priv), GFP_KERNEL);
 +      if (!priv)
@@ -240,38 +256,12 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
 +      phy_disable_eee_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 +      phy_disable_eee_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
 +
-+      if (IS_ENABLED(CONFIG_REALTEK_PHY_HWMON))
-+              return rtl822x_hwmon_init(phydev);
-+
-+      return 0;
-+}
-+
-+static int rtl8261n_probe(struct phy_device *phydev)
-+{
-+      int ret;
-+
-+      ret = rtl826x_probe(phydev);
++      ret = rtl826x_patch_db_init(phydev);
 +      if (ret < 0)
 +              return ret;
 +
-+      ret = rtl8261n_phy_patch_db_init(phydev);
-+      if (ret < 0)
-+              return ret;
-+
-+      return 0;
-+}
-+
-+static int rtl8264b_probe(struct phy_device *phydev)
-+{
-+      int ret;
-+
-+      ret = rtl826x_probe(phydev);
-+      if (ret < 0)
-+              return ret;
-+
-+      ret = rtl8264b_phy_patch_db_init(phydev);
-+      if (ret < 0)
-+              return ret;
++      if (IS_ENABLED(CONFIG_REALTEK_PHY_HWMON))
++              return rtl822x_hwmon_init(phydev);
 +
 +      return 0;
 +}
@@ -711,14 +701,14 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
  static struct phy_driver realtek_drvs[] = {
        {
                PHY_ID_MATCH_EXACT(0x00008201),
-@@ -2520,6 +3144,108 @@ static struct phy_driver realtek_drvs[]
+@@ -2520,6 +3134,108 @@ static struct phy_driver realtek_drvs[]
                .resume         = genphy_resume,
                .read_mmd       = genphy_read_mmd_unsupported,
                .write_mmd      = genphy_write_mmd_unsupported,
 +      }, {
 +              .name           = "RTL8251L 5Gbps PHY",
 +              .config_init    = rtl826x_config_init,
-+              .probe          = rtl8261n_probe,
++              .probe          = rtl826x_probe,
 +              .get_features   = rtl825xb_get_features,
 +              .suspend        = rtl826x_suspend,
 +              .resume         = rtlgen_c45_resume,
@@ -735,7 +725,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
 +      }, {
 +              .name           = "RTL8254B 5Gbps PHY",
 +              .config_init    = rtl826x_config_init,
-+              .probe          = rtl8264b_probe,
++              .probe          = rtl826x_probe,
 +              .get_features   = rtl825xb_get_features,
 +              .suspend        = rtl826x_suspend,
 +              .resume         = rtlgen_c45_resume,
@@ -752,7 +742,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
 +      }, {
 +              .name           = "RTL8261BE 10Gbps PHY",
 +              .config_init    = rtl826x_config_init,
-+              .probe          = rtl8261n_probe,
++              .probe          = rtl826x_probe,
 +              .get_features   = rtl826x_get_features,
 +              .suspend        = rtl826x_suspend,
 +              .resume         = rtlgen_c45_resume,
@@ -769,7 +759,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
 +      }, {
 +              .name           = "RTL8261N 10Gbps PHY",
 +              .config_init    = rtl826x_config_init,
-+              .probe          = rtl8261n_probe,
++              .probe          = rtl826x_probe,
 +              .get_features   = rtl826x_get_features,
 +              .suspend        = rtl826x_suspend,
 +              .resume         = rtlgen_c45_resume,
@@ -787,7 +777,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
 +              PHY_ID_MATCH_EXACT(RTL_8264),
 +              .name           = "RTL8264 10Gbps PHY",
 +              .config_init    = rtl826x_config_init,
-+              .probe          = rtl8264b_probe,
++              .probe          = rtl826x_probe,
 +              .get_features   = rtl826x_get_features,
 +              .suspend        = rtl826x_suspend,
 +              .resume         = rtlgen_c45_resume,
@@ -803,7 +793,7 @@ Signed-off-by: Balázs Triszka <info@balika011.hu>
 +      }, {
 +              .name           = "RTL8264B 10Gbps PHY",
 +              .config_init    = rtl826x_config_init,
-+              .probe          = rtl8264b_probe,
++              .probe          = rtl826x_probe,
 +              .get_features   = rtl826x_get_features,
 +              .suspend        = rtl826x_suspend,
 +              .resume         = rtlgen_c45_resume,
index 6f3758696a70f7a49728455b3c873b9ef070055e..d4df285594f6c58f2813f05f3267d19ec7153b62 100644 (file)
@@ -54,7 +54,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  #define RTL8366RB_POWER_SAVE                  0x15
  #define RTL8366RB_POWER_SAVE_ON                       BIT(12)
  
-@@ -1889,6 +1892,66 @@ static int rtl8224_cable_test_get_status
+@@ -1890,6 +1893,66 @@ static int rtl8224_cable_test_get_status
        return rtl8224_cable_test_report(phydev, finished);
  }
  
@@ -121,7 +121,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
  {
        int val;
-@@ -3096,6 +3159,8 @@ static struct phy_driver realtek_drvs[]
+@@ -3086,6 +3149,8 @@ static struct phy_driver realtek_drvs[]
                PHY_ID_MATCH_EXACT(0x001ccad0),
                .name           = "RTL8224 2.5Gbps PHY",
                .flags          = PHY_POLL_CABLE_TEST,
index fc84b749812e4de6b04e8ce7fd416d581f7bc198..ca9205157ead966dadc3df1fc24a8d006d79eeed 100644 (file)
@@ -32,7 +32,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  
  #define RTL8366RB_POWER_SAVE                  0x15
  #define RTL8366RB_POWER_SAVE_ON                       BIT(12)
-@@ -1940,9 +1941,40 @@ static int rtl8224_mdi_config_order(stru
+@@ -1941,9 +1942,40 @@ static int rtl8224_mdi_config_order(stru
                                          order ? BIT(port_offset) : 0);
  }
  
index c71107740979d4d230241dfd487c80656d8fe8af..510f3b25ce57f4923bfcbd59c7caecfc3ce7c909 100644 (file)
@@ -60,7 +60,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  #define RTL8366RB_POWER_SAVE                  0x15
  #define RTL8366RB_POWER_SAVE_ON                       BIT(12)
  
-@@ -1391,6 +1406,144 @@ static int rtl822x_init_phycr1(struct ph
+@@ -1392,6 +1407,144 @@ static int rtl822x_init_phycr1(struct ph
                                      mask, val);
  }
  
@@ -205,7 +205,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)
  {
        bool has_2500, has_sgmii;
-@@ -3083,6 +3236,7 @@ static struct phy_driver realtek_drvs[]
+@@ -3073,6 +3226,7 @@ static struct phy_driver realtek_drvs[]
                .soft_reset     = rtl822x_c45_soft_reset,
                .get_features   = rtl822x_c45_get_features,
                .config_aneg    = rtl822x_c45_config_aneg,
index 1fc138a4659f60f14cd71500ea639bf1b8750b1e..d5c9bc7ab090eae628c4a778ff07a68f19b560bf 100644 (file)
@@ -42,7 +42,7 @@
  #define RTL8221B_PHYCR1                               0xa430
  #define RTL8221B_PHYCR1_ALDPS_EN              BIT(2)
  #define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN     BIT(12)
-@@ -2069,6 +2104,147 @@ exit:
+@@ -2070,6 +2105,147 @@ exit:
        return ret;
  }
  
  static int rtl8224_mdi_config_order(struct phy_device *phydev)
  {
        struct device_node *np = phydev->mdio.dev.of_node;
-@@ -2123,6 +2299,10 @@ static int rtl8224_config_init(struct ph
+@@ -2124,6 +2300,10 @@ static int rtl8224_config_init(struct ph
  {
        int ret;