arm64: dts: freescale: Minor whitespace cleanup

The DTS code coding style expects exactly one space around '=' or '{'
characters.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
index 6f27a9cc249461aef34705bf1cada3fe215f1060..86d018f470c1ac1246bd95203c54e36189bad3aa 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
@@ -256,7 +256,7 @@
 };
 
 &asrc0 {
-       fsl,asrc-rate  = <48000>;
+       fsl,asrc-rate = <48000>;
 };
 
 &adc0 {

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index b6d64d3906eafab226c8e0ccae66fe763fdc8c25..25a77cac6f0b5f71603933e75a6930956ac7239c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -652,7 +652,7 @@
        status = "okay";
 };
 
-&pcie0_ep{
+&pcie0_ep {
        phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>;
        phy-names = "pcie-phy";
        pinctrl-0 = <&pinctrl_pcieb>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
index 90e638b8e92a95214d8c3c719dd2a6db2630ebac..87fe3ebedb8d62263d3dc5b5ec9bd0931493211b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
@@ -333,7 +333,7 @@
                >;
        };
 
-       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp{
+       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x194
                        MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d4

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
index e5ca5a664b61e20e9c30c9e5ca01a6ae6da57596..79e4c3710ac3f44ca88db9a6059cce986bf1fc3a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
@@ -20,7 +20,7 @@
                pwms = <&pwm4 0 50000 0>;
                power-supply = <&reg_vdd_3v3_s>;
                enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
-               brightness-levels= <0 4 8 16 32 64 128 255>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
        };
 
        panel {

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts
index 2a736dbe96b42c8bd8959efe996816d545c320d9..58e36de7a2cd3153502baeceaa9b5925854e1a73 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts
@@ -36,7 +36,7 @@
        max-speed = <100>;
 };
 
-&ecspi1{
+&ecspi1 {
        pinctrl-0 = <&pinctrl_ecspi1>;
        cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
 };

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
index 231e480acfd423a43b755f8b1284c828ff372a8f..f654d866e58c06245b06348a14ca1b16c6c4550d 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
@@ -167,7 +167,7 @@
                          <&clk IMX8MP_VIDEO_PLL1>;
 };
 
-&ecspi1{
+&ecspi1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs2>;
        cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW &gpio1 6 GPIO_ACTIVE_LOW>;
@@ -565,7 +565,7 @@
        status = "disabled";
 };
 
-&pcie{
+&pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
        reset-gpio = <&gpio4 20 GPIO_ACTIVE_LOW>;
@@ -574,7 +574,7 @@
        status = "okay";
 };
 
-&pcie_phy{
+&pcie_phy {
        fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
        clocks = <&pcie0_refclk>;
        clock-names = "ref";

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index c0cc5611048e6a739f13c14bbd2e7b26f2715696..3730792daf5010213cbb9f6869a8110ea28eb48a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -309,7 +309,7 @@
 };
 
 &easrc {
-       fsl,asrc-rate  = <48000>;
+       fsl,asrc-rate = <48000>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
index baecf768a2ee08a16c9333e8a1f20fbfef19f865..e602c1c96143acb7062f7d17861f7063b8e0e9ff 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts
@@ -83,7 +83,7 @@
                compatible = "ti,tsc2046e-adc";
                reg = <0>;
                pinctrl-0 = <&pinctrl_touch>;
-               pinctrl-names ="default";
+               pinctrl-names = "default";
                spi-max-frequency = <1000000>;
                interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
                #io-channel-cells = <1>;

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index d0b3e66e09739261fbfe6c2f59dfda138dd8e271..202d5c67ac40b844ee38e8fb0f9caf2e186cfa9f 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -407,7 +407,7 @@
                audio-cpu = <&sai1>;
                audio-codec = <&wm8960>;
                hp-det-gpios = <&lsio_gpio0 31 GPIO_ACTIVE_HIGH>;
-               audio-routing = "Headphone Jack", "HP_L",
+               audio-routing = "Headphone Jack", "HP_L",
                                "Headphone Jack", "HP_R",
                                "Ext Spk", "SPK_LP",
                                "Ext Spk", "SPK_LN",

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index e602d147e39b937ef6e1ff3f45d3df685784ee9f..8e9e841cc82813f11e41616d53e7dc8f77f86b68 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -462,11 +462,11 @@
 
 /* VPU Mailboxes */
 &mu_m0 {
-       status="okay";
+       status = "okay";
 };
 
 &mu1_m0 {
-       status="okay";
+       status = "okay";
 };
 
 /* TODO MIPI CSI */

diff --git a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
index c5d86b54ad33b47a81fa8f89c1f29e37d1c5e055..8c5769f90746f7a1f44cd25cc7e9316a8ff36730 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts
@@ -276,7 +276,7 @@
                                regulator-ramp-delay = <3125>;
                        };
 
-                       buck4: BUCK4{
+                       buck4: BUCK4 {
                                regulator-name = "BUCK4";
                                regulator-min-microvolt = <1620000>;
                                regulator-max-microvolt = <3400000>;
@@ -284,7 +284,7 @@
                                regulator-always-on;
                        };
 
-                       buck5: BUCK5{
+                       buck5: BUCK5 {
                                regulator-name = "BUCK5";
                                regulator-min-microvolt = <1620000>;
                                regulator-max-microvolt = <3400000>;

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 5fab3e1d57764fee152ec06d43941718fa194cd9..1a9454ea531d0cd0008835b11a8d93d50e21c83c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -692,7 +692,7 @@
 };
 
 &scmi_iomuxc {
-       pinctrl_emdio: emdiogrp{
+       pinctrl_emdio: emdiogrp {
                fsl,pins = <
                        IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC               0x50e
                        IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO             0x90e

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 56d782f423bbba6b38bc51369ab9535e8da2eae4..4e5a2d40c71885d5842b64bfd6072716d36e8d7d 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -260,35 +260,35 @@
        sai1_mclk: clock-sai-mclk1 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency= <0>;
+               clock-frequency = <0>;
                clock-output-names = "sai1_mclk";
        };
 
        sai2_mclk: clock-sai-mclk2 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency= <0>;
+               clock-frequency = <0>;
                clock-output-names = "sai2_mclk";
        };
 
        sai3_mclk: clock-sai-mclk3 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency= <0>;
+               clock-frequency = <0>;
                clock-output-names = "sai3_mclk";
        };
 
        sai4_mclk: clock-sai-mclk4 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency= <0>;
+               clock-frequency = <0>;
                clock-output-names = "sai4_mclk";
        };
 
        sai5_mclk: clock-sai-mclk5 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency= <0>;
+               clock-frequency = <0>;
                clock-output-names = "sai5_mclk";
        };
 
@@ -1212,7 +1212,7 @@
                                assigned-clock-rates = <400000000>;
                                bus-width = <8>;
                                fsl,tuning-start-tap = <1>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                status = "disabled";
                        };
 
@@ -1229,7 +1229,7 @@
                                assigned-clock-rates = <400000000>;
                                bus-width = <4>;
                                fsl,tuning-start-tap = <1>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                status = "disabled";
                        };
 
@@ -1246,7 +1246,7 @@
                                assigned-clock-rates = <400000000>;
                                bus-width = <4>;
                                fsl,tuning-start-tap = <1>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                status = "disabled";
                        };
                };
@@ -1846,9 +1846,9 @@
                                 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
                                 <&hsio_blk_ctl 0>;
                        clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
-                       assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
-                                        <&scmi_clk IMX95_CLK_HSIOPLL>,
-                                        <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
+                       assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
+                                         <&scmi_clk IMX95_CLK_HSIOPLL>,
+                                         <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
                        assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
                        assigned-clock-parents = <0>, <0>,
                                                 <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
@@ -1880,9 +1880,9 @@
                                 <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
                                 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
                        clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
-                       assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
-                                        <&scmi_clk IMX95_CLK_HSIOPLL>,
-                                        <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
+                       assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
+                                         <&scmi_clk IMX95_CLK_HSIOPLL>,
+                                         <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
                        assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
                        assigned-clock-parents = <0>, <0>,
                                                 <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
@@ -1920,9 +1920,9 @@
                                 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
                                 <&hsio_blk_ctl 0>;
                        clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
-                       assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
-                                        <&scmi_clk IMX95_CLK_HSIOPLL>,
-                                        <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
+                       assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
+                                         <&scmi_clk IMX95_CLK_HSIOPLL>,
+                                         <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
                        assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
                        assigned-clock-parents = <0>, <0>,
                                                 <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
@@ -1956,9 +1956,9 @@
                                 <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
                                 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
                        clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
-                       assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
-                                        <&scmi_clk IMX95_CLK_HSIOPLL>,
-                                        <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
+                       assigned-clocks = <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
+                                         <&scmi_clk IMX95_CLK_HSIOPLL>,
+                                         <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
                        assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
                        assigned-clock-parents = <0>, <0>,
                                                 <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;