zynqmp: Move to RTL4.0 memory map

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index d51d1a236e23547eedb844c0b49e69158b5bef20..02c9b672b1cd45d879a310cfc235a2511b1c9d0e 100644 (file)
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -11,19 +11,19 @@
 #define ZYNQ_SERIAL_BASEADDR0  0xFF000000
 #define ZYNQ_SERIAL_BASEADDR1  0xFF001000
 
-#define ZYNQ_GEM_BASEADDR0     0xFF009000
-#define ZYNQ_GEM_BASEADDR1     0xFF00A000
-#define ZYNQ_GEM_BASEADDR2     0xFF00B000
-#define ZYNQ_GEM_BASEADDR3     0xFF00C000
+#define ZYNQ_GEM_BASEADDR0     0xFF0B0000
+#define ZYNQ_GEM_BASEADDR1     0xFF0C0000
+#define ZYNQ_GEM_BASEADDR2     0xFF0D0000
+#define ZYNQ_GEM_BASEADDR3     0xFF0E0000
 
-#define ZYNQ_TTC_BASEADDR0     0xFF00F000
+#define ZYNQ_TTC_BASEADDR0     0xFF110000
 
-#define ZYNQ_QSPI_BASEADDR     0xFF00D000
+#define ZYNQ_QSPI_BASEADDR     0xFF0F0000
 
-#define ZYNQ_SDHCI_BASEADDR0   0xFF014000
-#define ZYNQ_SDHCI_BASEADDR1   0xFF015000
+#define ZYNQ_SDHCI_BASEADDR0   0xFF160000
+#define ZYNQ_SDHCI_BASEADDR1   0xFF170000
 
-#define ZYNQMP_CRL_APB_BASEADDR        0xFF400000
+#define ZYNQMP_CRL_APB_BASEADDR        0xFF5E0000
 
 struct crlapb_regs {
        u32 reserved0[128];
@@ -39,11 +39,11 @@ struct crlapb_regs {
 #define SD_MODE                0x00000005
 #define JTAG_MODE      0x00000000
 
-#define ZYNQMP_CSU_BASEADDR    0xFFCC0000
+#define ZYNQMP_CSU_BASEADDR    0xFFCA0000
 
 struct csu_regs {
-       u32 reserved0[24];
-       u32 version; /* 0x60 will be moved to 0x24 */
+       u32 reserved0[16];
+       u32 version; /* 0x44 */
 };
 
 #define csu_base ((struct csu_regs *)ZYNQMP_CSU_BASEADDR)