ifeq ($(CONFIG_CRYPTO_LIB_MD5_ARCH),y)
CFLAGS_md5.o += -I$(src)/$(SRCARCH)
libmd5-$(CONFIG_PPC) += powerpc/md5-asm.o
-libmd5-$(CONFIG_SPARC) += sparc/md5_asm.o
endif # CONFIG_CRYPTO_LIB_MD5_ARCH
################################################################################
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * MD5 accelerated using the sparc64 crypto opcodes
- *
- * Copyright (c) Alan Smithee.
- * Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
- * Copyright (c) Jean-Francois Dive <jef@linuxbe.org>
- * Copyright (c) Mathias Krause <minipli@googlemail.com>
- * Copyright (c) Cryptoapi developers.
- * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
- */
-
-#include <asm/elf.h>
-#include <asm/opcodes.h>
-#include <asm/pstate.h>
-
-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_md5_opcodes);
-
-asmlinkage void md5_sparc64_transform(struct md5_block_state *state,
- const u8 *data, size_t nblocks);
-
-static void md5_blocks(struct md5_block_state *state,
- const u8 *data, size_t nblocks)
-{
- if (static_branch_likely(&have_md5_opcodes)) {
- cpu_to_le32_array(state->h, ARRAY_SIZE(state->h));
- md5_sparc64_transform(state, data, nblocks);
- le32_to_cpu_array(state->h, ARRAY_SIZE(state->h));
- } else {
- md5_blocks_generic(state, data, nblocks);
- }
-}
-
-#define md5_mod_init_arch md5_mod_init_arch
-static void md5_mod_init_arch(void)
-{
- unsigned long cfr;
-
- if (!(sparc64_elf_hwcap & HWCAP_SPARC_CRYPTO))
- return;
-
- __asm__ __volatile__("rd %%asr26, %0" : "=r" (cfr));
- if (!(cfr & CFR_MD5))
- return;
-
- static_branch_enable(&have_md5_opcodes);
- pr_info("Using sparc64 md5 opcode optimized MD5 implementation\n");
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#include <linux/linkage.h>
-#include <asm/opcodes.h>
-#include <asm/visasm.h>
-
-ENTRY(md5_sparc64_transform)
- /* %o0 = digest, %o1 = data, %o2 = rounds */
- VISEntryHalf
- ld [%o0 + 0x00], %f0
- ld [%o0 + 0x04], %f1
- andcc %o1, 0x7, %g0
- ld [%o0 + 0x08], %f2
- bne,pn %xcc, 10f
- ld [%o0 + 0x0c], %f3
-
-1:
- ldd [%o1 + 0x00], %f8
- ldd [%o1 + 0x08], %f10
- ldd [%o1 + 0x10], %f12
- ldd [%o1 + 0x18], %f14
- ldd [%o1 + 0x20], %f16
- ldd [%o1 + 0x28], %f18
- ldd [%o1 + 0x30], %f20
- ldd [%o1 + 0x38], %f22
-
- MD5
-
- subcc %o2, 1, %o2
- bne,pt %xcc, 1b
- add %o1, 0x40, %o1
-
-5:
- st %f0, [%o0 + 0x00]
- st %f1, [%o0 + 0x04]
- st %f2, [%o0 + 0x08]
- st %f3, [%o0 + 0x0c]
- retl
- VISExitHalf
-10:
- alignaddr %o1, %g0, %o1
-
- ldd [%o1 + 0x00], %f10
-1:
- ldd [%o1 + 0x08], %f12
- ldd [%o1 + 0x10], %f14
- ldd [%o1 + 0x18], %f16
- ldd [%o1 + 0x20], %f18
- ldd [%o1 + 0x28], %f20
- ldd [%o1 + 0x30], %f22
- ldd [%o1 + 0x38], %f24
- ldd [%o1 + 0x40], %f26
-
- faligndata %f10, %f12, %f8
- faligndata %f12, %f14, %f10
- faligndata %f14, %f16, %f12
- faligndata %f16, %f18, %f14
- faligndata %f18, %f20, %f16
- faligndata %f20, %f22, %f18
- faligndata %f22, %f24, %f20
- faligndata %f24, %f26, %f22
-
- MD5
-
- subcc %o2, 1, %o2
- fsrc2 %f26, %f10
- bne,pt %xcc, 1b
- add %o1, 0x40, %o1
-
- ba,a,pt %xcc, 5b
-ENDPROC(md5_sparc64_transform)