drm/xe/pf: Add runtime registers for GFX ver >= 35

Add a dedicated runtime register list for GFX ver >= 35.
Compared to the list for GFX >= 30, this variant drops
HUC_KERNEL_LOAD_INFO, MIRROR_FUSE1 and adds SERVICE_COPY_ENABLE.

v2:
 - drop MIRROR_FUSE1 register
 - update commit message

Fixes: 5e0de2dfbc1b ("drm/xe/cri: Add CRI platform definition")
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patch.msgid.link/20251107211845.3633633-1-piotr.piorkowski@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
index 76dd9233ef9ffbc7d37be4ce1130686561c8de1a..2eb21610e5a05d8631a4c40d7aade1336b5e80e2 100644 (file)
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
@@ -99,11 +99,30 @@ static const struct xe_reg ver_3000_runtime_regs[] = {
        HUC_KERNEL_LOAD_INFO,           /* _MMIO(0xc1dc) */
 };
 
+static const struct xe_reg ver_35_runtime_regs[] = {
+       RPM_CONFIG0,                    /* _MMIO(0x0d00) */
+       XEHP_FUSE4,                     /* _MMIO(0x9114) */
+       MIRROR_FUSE3,                   /* _MMIO(0x9118) */
+       MIRROR_L3BANK_ENABLE,           /* _MMIO(0x9130) */
+       XELP_EU_ENABLE,                 /* _MMIO(0x9134) */
+       XELP_GT_GEOMETRY_DSS_ENABLE,    /* _MMIO(0x913c) */
+       GT_VEBOX_VDBOX_DISABLE,         /* _MMIO(0x9140) */
+       XEHP_GT_COMPUTE_DSS_ENABLE,     /* _MMIO(0x9144) */
+       XEHPC_GT_COMPUTE_DSS_ENABLE_EXT,/* _MMIO(0x9148) */
+       XE2_GT_COMPUTE_DSS_2,           /* _MMIO(0x914c) */
+       XE2_GT_GEOMETRY_DSS_1,          /* _MMIO(0x9150) */
+       XE2_GT_GEOMETRY_DSS_2,          /* _MMIO(0x9154) */
+       SERVICE_COPY_ENABLE,            /* _MMIO(0x9170) */
+};
+
 static const struct xe_reg *pick_runtime_regs(struct xe_device *xe, unsigned int *count)
 {
        const struct xe_reg *regs;
 
-       if (GRAPHICS_VERx100(xe) >= 3000) {
+       if (GRAPHICS_VER(xe) >= 35) {
+               *count = ARRAY_SIZE(ver_35_runtime_regs);
+               regs = ver_35_runtime_regs;
+       } else if (GRAPHICS_VERx100(xe) >= 3000) {
                *count = ARRAY_SIZE(ver_3000_runtime_regs);
                regs = ver_3000_runtime_regs;
        } else if (GRAPHICS_VERx100(xe) >= 2000) {