--- /dev/null
+From f4d3da72a76a9ce5f57bba64788931686a9dc333 Mon Sep 17 00:00:00 2001
+From: Huacai Chen <chenhc@lemote.com>
+Date: Tue, 30 Mar 2021 23:33:33 +0800
+Subject: drm/amdgpu: Set a suitable dev_info.gart_page_size
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Huacai Chen <chenhc@lemote.com>
+
+commit f4d3da72a76a9ce5f57bba64788931686a9dc333 upstream.
+
+In Mesa, dev_info.gart_page_size is used for alignment and it was
+set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU
+driver requires an alignment on CPU pages. So, for non-4KB page system,
+gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE).
+
+Signed-off-by: Rui Wang <wangr@lemote.com>
+Signed-off-by: Huacai Chen <chenhc@lemote.com>
+Link: https://github.com/loongson-community/linux-stable/commit/caa9c0a1
+[Xi: rebased for drm-next, use max_t for checkpatch,
+ and reworded commit message.]
+Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang>
+BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1549
+Tested-by: Dan Horák <dan@danny.cz>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+[Salvatore Bonaccorso: Backport to 5.10.y which does not contain
+a5a52a43eac0 ("drm/amd/amdgpu/amdgpu_kms: Remove 'struct
+drm_amdgpu_info_device dev_info' from the stack") which removes dev_info
+from the stack and places it on the heap.]
+Tested-by: Timothy Pearson <tpearson@raptorengineering.com>
+Signed-off-by: Salvatore Bonaccorso <carnil@debian.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+@@ -766,9 +766,9 @@ static int amdgpu_info_ioctl(struct drm_
+ dev_info.high_va_offset = AMDGPU_GMC_HOLE_END;
+ dev_info.high_va_max = AMDGPU_GMC_HOLE_END | vm_size;
+ }
+- dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
++ dev_info.virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
+ dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
+- dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;
++ dev_info.gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
+ dev_info.cu_active_number = adev->gfx.cu_info.number;
+ dev_info.cu_ao_mask = adev->gfx.cu_info.ao_cu_mask;
+ dev_info.ce_ram_size = adev->gfx.ce_ram_size;