endchoice
+if ARM64
+
+config MTK_MEM_MAP_DDR_SIZE
+ hex "DDR .size in mem_map"
+ default 0x200000000 if TARGET_MT7987 || TARGET_MT7988 || TARGET_MT8188
+ default 0xc0000000 if TARGET_MT8365
+ default 0x80000000 if TARGET_MT7981 || TARGET_MT7986 || TARGET_MT8183
+ default 0x40000000 if TARGET_MT7622 || TARGET_MT8512
+ default 0x20000000
+ help
+ Target-specific DDR region size in mem_map.
+
+config MTK_MEM_MAP_MMIO_SIZE
+ hex "MMIO .size in mem_map"
+ default 0x40000000 if TARGET_MT7622 || TARGET_MT7981 || TARGET_MT7986 || TARGET_MT7987 || TARGET_MT7988 || TARGET_MT8512
+ default 0x20000000
+ help
+ Target-specific MMIO region size in mem_map.
+
+endif
+
config SYS_BOARD
string "Board name"
default "mt7622" if TARGET_MT7622
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_ARM64) += armv8-mem-map.o
obj-y += cpu.o
obj-$(CONFIG_MTK_TZ_MOVABLE) += tzcfg.o
obj-$(CONFIG_XPL_BUILD) += spl.o
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2023 BayLibre SAS
- * Author: Julien Masson <jmasson@baylibre.com>
- */
+// SPDX-License-Identifier: GPL-2.0-only
#include <asm/armv8/mmu.h>
-static struct mm_region mt8365_evk_mem_map[] = {
+static struct mm_region mediatek_mem_map[] = {
{
/* DDR */
.virt = 0x40000000UL,
.phys = 0x40000000UL,
- .size = 0xc0000000UL,
+ .size = CONFIG_MTK_MEM_MAP_DDR_SIZE,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
}, {
.virt = 0x00000000UL,
.phys = 0x00000000UL,
- .size = 0x20000000UL,
+ .size = CONFIG_MTK_MEM_MAP_MMIO_SIZE,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
- 0,
+ /* List terminator */
}
};
-struct mm_region *mem_map = mt8365_evk_mem_map;
+struct mm_region *mem_map = mediatek_mem_map;
{
psci_system_reset();
}
-
-static struct mm_region mt7622_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-struct mm_region *mem_map = mt7622_mem_map;
{
psci_system_reset();
}
-
-static struct mm_region mt7981_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-
-struct mm_region *mem_map = mt7981_mem_map;
{
psci_system_reset();
}
-
-static struct mm_region mt7986_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-
-struct mm_region *mem_map = mt7986_mem_map;
{
psci_system_reset();
}
-
-static struct mm_region mt7987_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x200000000ULL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-
-struct mm_region *mem_map = mt7987_mem_map;
{
psci_system_reset();
}
-
-static struct mm_region mt7988_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x200000000ULL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-
-struct mm_region *mem_map = mt7988_mem_map;
printf("CPU: MediaTek MT8183\n");
return 0;
}
-
-static struct mm_region mt8183_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-struct mm_region *mem_map = mt8183_mem_map;
debug("CPU: MediaTek MT8512\n");
return 0;
}
-
-static struct mm_region mt8512_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x40000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-
-struct mm_region *mem_map = mt8512_mem_map;
printf("CPU: MediaTek MT8516\n");
return 0;
}
-
-static struct mm_region mt8516_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-struct mm_region *mem_map = mt8516_mem_map;
printf("CPU: MediaTek MT8518\n");
return 0;
}
-
-static struct mm_region mt8518_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-
-struct mm_region *mem_map = mt8518_mem_map;
MT8365 EVK
M: Julien Masson <jmasson@baylibre.com>
S: Maintained
-F: board/mediatek/mt8365_evk/
F: configs/mt8365_evk_defconfig
MT8390 EVK
M: Julien Masson <jmasson@baylibre.com>
M: Macpaul Lin <Macpaul.Lin@mediatek.com>
S: Maintained
-F: board/mediatek/mt8390_evk/
F: configs/mt8390_evk_defconfig
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-
-obj-y += mt8365_evk.o
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-
-obj-y += mt8390_evk.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2026 BayLibre SAS
- * Author: Julien Masson <jmasson@baylibre.com>
- */
-
-#include <linux/types.h>
-#include <asm/armv8/mmu.h>
-
-static struct mm_region mt8390_evk_mem_map[] = {
- {
- /* DDR */
- .virt = 0x40000000UL,
- .phys = 0x40000000UL,
- .size = 0x200000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
- }, {
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- 0,
- }
-};
-
-struct mm_region *mem_map = mt8390_evk_mem_map;