]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm: mediatek: consolidate ARMv8 memory maps
authorDavid Lechner <dlechner@baylibre.com>
Mon, 9 Feb 2026 16:39:31 +0000 (10:39 -0600)
committerTom Rini <trini@konsulko.com>
Wed, 18 Feb 2026 17:57:14 +0000 (11:57 -0600)
Consolidate all mem_map definitions for MediaTek ARMv8 platforms into a
single file. The size of the DDR and MMIO regions can vary, so Kconfig
options are added to configure them by target.

Signed-off-by: David Lechner <dlechner@baylibre.com>
16 files changed:
arch/arm/mach-mediatek/Kconfig
arch/arm/mach-mediatek/Makefile
arch/arm/mach-mediatek/armv8-mem-map.c [moved from board/mediatek/mt8365_evk/mt8365_evk.c with 54% similarity]
arch/arm/mach-mediatek/mt7622/init.c
arch/arm/mach-mediatek/mt7981/init.c
arch/arm/mach-mediatek/mt7986/init.c
arch/arm/mach-mediatek/mt7987/init.c
arch/arm/mach-mediatek/mt7988/init.c
arch/arm/mach-mediatek/mt8183/init.c
arch/arm/mach-mediatek/mt8512/init.c
arch/arm/mach-mediatek/mt8516/init.c
arch/arm/mach-mediatek/mt8518/init.c
board/mediatek/MAINTAINERS
board/mediatek/mt8365_evk/Makefile [deleted file]
board/mediatek/mt8390_evk/Makefile [deleted file]
board/mediatek/mt8390_evk/mt8390_evk.c [deleted file]

index d1d2605b2ccbe4fc34fea9d67e7d6852afe0dc76..33717a1864f58f281a91dec935a95cff512fe7db 100644 (file)
@@ -130,6 +130,27 @@ config TARGET_MT8518
 
 endchoice
 
+if ARM64
+
+config MTK_MEM_MAP_DDR_SIZE
+       hex "DDR .size in mem_map"
+       default 0x200000000 if TARGET_MT7987 || TARGET_MT7988 || TARGET_MT8188
+       default 0xc0000000 if TARGET_MT8365
+       default 0x80000000 if TARGET_MT7981 || TARGET_MT7986 || TARGET_MT8183
+       default 0x40000000 if TARGET_MT7622 || TARGET_MT8512
+       default 0x20000000
+       help
+               Target-specific DDR region size in mem_map.
+
+config MTK_MEM_MAP_MMIO_SIZE
+       hex "MMIO .size in mem_map"
+       default 0x40000000 if TARGET_MT7622 || TARGET_MT7981 || TARGET_MT7986 || TARGET_MT7987 || TARGET_MT7988 || TARGET_MT8512
+       default 0x20000000
+       help
+               Target-specific MMIO region size in mem_map.
+
+endif
+
 config SYS_BOARD
        string "Board name"
        default "mt7622" if TARGET_MT7622
index 44591bed6fa0c57a026fa0b71f5e46911ca18a50..17e645989e58e51b3f5b5104eb6265279d93a231 100644 (file)
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier:     GPL-2.0
 
+obj-$(CONFIG_ARM64) += armv8-mem-map.o
 obj-y  += cpu.o
 obj-$(CONFIG_MTK_TZ_MOVABLE)   += tzcfg.o
 obj-$(CONFIG_XPL_BUILD)        += spl.o
similarity index 54%
rename from board/mediatek/mt8365_evk/mt8365_evk.c
rename to arch/arm/mach-mediatek/armv8-mem-map.c
index 41a6febf03d517b571bcbc23c787b6b000715c44..3587a2a9dd26b67a0c6e48b7b49cd06d13b4493a 100644 (file)
@@ -1,28 +1,24 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2023 BayLibre SAS
- * Author: Julien Masson <jmasson@baylibre.com>
- */
+// SPDX-License-Identifier: GPL-2.0-only
 
 #include <asm/armv8/mmu.h>
 
-static struct mm_region mt8365_evk_mem_map[] = {
+static struct mm_region mediatek_mem_map[] = {
        {
                /* DDR */
                .virt = 0x40000000UL,
                .phys = 0x40000000UL,
-               .size = 0xc0000000UL,
+               .size = CONFIG_MTK_MEM_MAP_DDR_SIZE,
                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
        }, {
                .virt = 0x00000000UL,
                .phys = 0x00000000UL,
-               .size = 0x20000000UL,
+               .size = CONFIG_MTK_MEM_MAP_MMIO_SIZE,
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN
        }, {
-               0,
+               /* List terminator */
        }
 };
 
-struct mm_region *mem_map = mt8365_evk_mem_map;
+struct mm_region *mem_map = mediatek_mem_map;
index 368f29162244563815abc7d021d138e1bd1d272c..a043ca873983b5aa090e0edf0851549dafd1c2b8 100644 (file)
@@ -36,23 +36,3 @@ void reset_cpu(void)
 {
        psci_system_reset();
 }
-
-static struct mm_region mt7622_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-struct mm_region *mem_map = mt7622_mem_map;
index 07da58971904393e0babb03c1d7c9c8b189385ac..79afd6ce6bedce8f10cd0da3a0088cf292cf286e 100644 (file)
@@ -30,24 +30,3 @@ void reset_cpu(void)
 {
        psci_system_reset();
 }
-
-static struct mm_region mt7981_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x80000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-
-struct mm_region *mem_map = mt7981_mem_map;
index a521c95bd9d39d0d06e608082fd942e871f1b2b4..1fe56b3f1452dec38a28e259ffc66a844b2985d3 100644 (file)
@@ -30,24 +30,3 @@ void reset_cpu(void)
 {
        psci_system_reset();
 }
-
-static struct mm_region mt7986_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x80000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-
-struct mm_region *mem_map = mt7986_mem_map;
index 8b2682978097242d212c931d04a15b42a62630be..6364ab497f74abbfee1dd7cf2a3f9fa489de1ef0 100644 (file)
@@ -39,24 +39,3 @@ void reset_cpu(ulong addr)
 {
        psci_system_reset();
 }
-
-static struct mm_region mt7987_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x200000000ULL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-
-struct mm_region *mem_map = mt7987_mem_map;
index 8bdd3848d26127c6efa630248f3a66809d930f33..7ff843585ecb4f872ffc971fe57977ec00789d46 100644 (file)
@@ -38,24 +38,3 @@ void reset_cpu(ulong addr)
 {
        psci_system_reset();
 }
-
-static struct mm_region mt7988_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x200000000ULL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-
-struct mm_region *mem_map = mt7988_mem_map;
index b445f3ea1e35ff1a6eac258f62be5332b47b3b64..8dbf9c3df7e0fc65b92818606bbd33af9cd7b4c8 100644 (file)
@@ -47,23 +47,3 @@ int print_cpuinfo(void)
        printf("CPU:   MediaTek MT8183\n");
        return 0;
 }
-
-static struct mm_region mt8183_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x80000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x20000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-struct mm_region *mem_map = mt8183_mem_map;
index 3b48caf5196c5dacff1b4f7e5dfe2ec3ea7c4a1e..361c589cbc2d5f6dcef6f633cdb41de574fb6381 100644 (file)
@@ -59,24 +59,3 @@ int print_cpuinfo(void)
        debug("CPU:   MediaTek MT8512\n");
        return 0;
 }
-
-static struct mm_region mt8512_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x40000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-
-struct mm_region *mem_map = mt8512_mem_map;
index 82f8c5097450721b4ff5462852709e833d43e231..1d925dd478a379f76f2806aa60d3c12dc79c0278 100644 (file)
@@ -94,23 +94,3 @@ int print_cpuinfo(void)
        printf("CPU:   MediaTek MT8516\n");
        return 0;
 }
-
-static struct mm_region mt8516_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x20000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x20000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-struct mm_region *mem_map = mt8516_mem_map;
index c04bcb6351780d077f67e7c47701e833a4656b8d..8fa1346021a3579c884aa1efee03451c5620bff4 100644 (file)
@@ -51,24 +51,3 @@ int print_cpuinfo(void)
        printf("CPU:   MediaTek MT8518\n");
        return 0;
 }
-
-static struct mm_region mt8518_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x20000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x20000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-
-struct mm_region *mem_map = mt8518_mem_map;
index 3345c87d30b8786d65c05bc93ae8d4139046cf44..5d19892e26b98ea605370b030fa21b20f3d61a94 100644 (file)
@@ -1,12 +1,10 @@
 MT8365 EVK
 M:     Julien Masson <jmasson@baylibre.com>
 S:     Maintained
-F:     board/mediatek/mt8365_evk/
 F:     configs/mt8365_evk_defconfig
 
 MT8390 EVK
 M:     Julien Masson <jmasson@baylibre.com>
 M:     Macpaul Lin <Macpaul.Lin@mediatek.com>
 S:     Maintained
-F:     board/mediatek/mt8390_evk/
 F:     configs/mt8390_evk_defconfig
diff --git a/board/mediatek/mt8365_evk/Makefile b/board/mediatek/mt8365_evk/Makefile
deleted file mode 100644 (file)
index 90fc92b..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier:     GPL-2.0
-
-obj-y += mt8365_evk.o
diff --git a/board/mediatek/mt8390_evk/Makefile b/board/mediatek/mt8390_evk/Makefile
deleted file mode 100644 (file)
index a26d468..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier:     GPL-2.0
-
-obj-y += mt8390_evk.o
diff --git a/board/mediatek/mt8390_evk/mt8390_evk.c b/board/mediatek/mt8390_evk/mt8390_evk.c
deleted file mode 100644 (file)
index 5731199..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2026 BayLibre SAS
- * Author: Julien Masson <jmasson@baylibre.com>
- */
-
-#include <linux/types.h>
-#include <asm/armv8/mmu.h>
-
-static struct mm_region mt8390_evk_mem_map[] = {
-       {
-               /* DDR */
-               .virt = 0x40000000UL,
-               .phys = 0x40000000UL,
-               .size = 0x200000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-       }, {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x20000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               0,
-       }
-};
-
-struct mm_region *mem_map = mt8390_evk_mem_map;