ARM: dts: renesas: r7s72100: Add boot phase tags

bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.  Add bootph-all for all nodes that are used in the
bootloader on Renesas RZ/A1 SoCs.

All SoCs require BSC bus, PFC pin control, and OSTM0 timer access during
all stages of the boot process, those are marked using bootph-all
property, and so is the SoC bus node which contains the PFC and OSTM
IPs.

Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250806150448.9669-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/renesas/r7s72100-genmai.dts b/arch/arm/boot/dts/renesas/r7s72100-genmai.dts
index c81840dfb7da0c9a2963d9656ec257f93b8eb701..3c3756509714572cf253529306f5cab42577f8b7 100644 (file)
--- a/arch/arm/boot/dts/renesas/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/renesas/r7s72100-genmai.dts
@@ -203,6 +203,7 @@
 };
 
 &ostm0 {
+       bootph-all;
        status = "okay";
 };
 
@@ -258,6 +259,7 @@
        };
 
        scif2_pins: serial2 {
+               bootph-all;
                /* P3_0 as TxD2; P3_2 as RxD2 */
                pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
        };
@@ -286,7 +288,7 @@
 &scif2 {
        pinctrl-names = "default";
        pinctrl-0 = <&scif2_pins>;
-
+       bootph-all;
        status = "okay";
 };
 

diff --git a/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts b/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts
index 9d29861f23f1d964b80c63b12956973e4b5f93e6..23ddec21768574056cf52c0853cbfefdf693403a 100644 (file)
--- a/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts
+++ b/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts
@@ -59,6 +59,7 @@
 
 &pinctrl {
        scif2_pins: serial2 {
+               bootph-all;
                /* P6_2 as RxD2; P6_3 as TxD2 */
                pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
        };
@@ -99,6 +100,7 @@
 };
 
 &ostm0 {
+       bootph-all;
        status = "okay";
 };
 
@@ -109,7 +111,7 @@
 &scif2 {
        pinctrl-names = "default";
        pinctrl-0 = <&scif2_pins>;
-
+       bootph-all;
        status = "okay";
 };
 

diff --git a/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts b/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts
index 25c6d0c78828f01e60ec9320f4f64d9e5f1dcc13..91178fb9e7210216cacf9baa62b2050b49784b26 100644 (file)
--- a/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts
@@ -199,6 +199,7 @@
 
        /* Serial Console */
        scif2_pins: serial2 {
+               bootph-all;
                pinmux = <RZA1_PINMUX(3, 0, 6)>,        /* TxD2 */
                         <RZA1_PINMUX(3, 2, 4)>;        /* RxD2 */
        };
@@ -264,6 +265,7 @@
 };
 
 &ostm0 {
+       bootph-all;
        status = "okay";
 };
 
@@ -278,6 +280,7 @@
 &scif2 {
        pinctrl-names = "default";
        pinctrl-0 = <&scif2_pins>;
+       bootph-all;
        status = "okay";
 };
 

diff --git a/arch/arm/boot/dts/renesas/r7s72100.dtsi b/arch/arm/boot/dts/renesas/r7s72100.dtsi
index 1a866dbaf5e93423b74d7dad57483fe2b3edbf08..a1e4e9ac8f621acb00682af106266c88442a364d 100644 (file)
--- a/arch/arm/boot/dts/renesas/r7s72100.dtsi
+++ b/arch/arm/boot/dts/renesas/r7s72100.dtsi
@@ -41,6 +41,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0x18000000>;
+               bootph-all;
        };
 
        cpus {
@@ -107,6 +108,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
+               bootph-all;
 
                L2: cache-controller@3ffff000 {
                        compatible = "arm,pl310-cache";
@@ -557,6 +559,7 @@
 
                pinctrl: pinctrl@fcfe3000 {
                        compatible = "renesas,r7s72100-ports";
+                       bootph-all;
 
                        reg = <0xfcfe3000 0x4230>;