3.1 patches

added patches:
	viafb-correct-sync-polarity-for-olpc-dcon.patch

diff --git a/queue-3.1/series b/queue-3.1/series
index 48da661ef6b66e2fc29e61b01101a18961ee54ae..3a0f0785257e3b9590c5f6916853a8aab3b152aa 100644 (file)
--- a/queue-3.1/series
+++ b/queue-3.1/series
@@ -11,3 +11,4 @@ drm-i915-turn-on-another-required-clock-gating-bit-on-gen6.patch
 drm-i915-fix-inconsistent-backlight-level-during-disabled.patch
 pci-hotplug-shpchp-don-t-blindly-claim-non-amd-0x7450-device-ids.patch
 drm-radeon-kms-fix-up-gpio-i2c-mask-bits-for-r4xx.patch
+viafb-correct-sync-polarity-for-olpc-dcon.patch

diff --git a/queue-3.1/viafb-correct-sync-polarity-for-olpc-dcon.patch b/queue-3.1/viafb-correct-sync-polarity-for-olpc-dcon.patch
new file mode 100644 (file)
index 0000000..44e9d4a
--- /dev/null
+++ b/queue-3.1/viafb-correct-sync-polarity-for-olpc-dcon.patch
@@ -0,0 +1,43 @@
+From a32839696a8eef813a1aff604fbad9a32dff6c95 Mon Sep 17 00:00:00 2001
+From: Daniel Drake <dsd@laptop.org>
+Date: Mon, 21 Nov 2011 15:05:56 +0000
+Subject: viafb: correct sync polarity for OLPC DCON
+
+From: Daniel Drake <dsd@laptop.org>
+
+commit a32839696a8eef813a1aff604fbad9a32dff6c95 upstream.
+
+While the OLPC display appears to be able to handle either positive
+or negative sync, the Display Controller only recognises positive sync.
+
+This brings viafb (for XO-1.5) in line with lxfb (for XO-1) and
+fixes a recent regression where the XO-1.5 DCON could no longer be
+frozen. Thanks to Florian Tobias Schandinat for helping identify
+the fix.
+
+Test case: from a vt,
+       echo 1 > /sys/devices/platform/dcon/freeze
+should cause the current screen contents to freeze, rather than garbage being
+displayed.
+
+Signed-off-by: Daniel Drake <dsd@laptop.org>
+Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/video/via/share.h |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/video/via/share.h
++++ b/drivers/video/via/share.h
+@@ -557,8 +557,8 @@
+ #define M1200X720_R60_VSP       POSITIVE
+ 
+ /* 1200x900@60 Sync Polarity (DCON) */
+-#define M1200X900_R60_HSP       NEGATIVE
+-#define M1200X900_R60_VSP       NEGATIVE
++#define M1200X900_R60_HSP       POSITIVE
++#define M1200X900_R60_VSP       POSITIVE
+ 
+ /* 1280x600@60 Sync Polarity (GTF Mode) */
+ #define M1280x600_R60_HSP       NEGATIVE