Xilinx: ARM: net: Move the Zynq GEM driver to drivers/net

The Gigabit Ethernet Mac driver for Zynq should be available to any
board that uses Zynq

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/board/xilinx/zynq_common/Makefile b/board/xilinx/zynq_common/Makefile
index de16eae7340ff480cc0cab6e5808cb3f68f7ea36..64ad496d32fe730353321a7669a1b8d45116147c 100644 (file)
--- a/board/xilinx/zynq_common/Makefile
+++ b/board/xilinx/zynq_common/Makefile
@@ -31,10 +31,6 @@ LIB  = $(obj)lib$(BOARD).o
 COBJS-y        := board.o \
           ../common/xbasic_types.o
 
-COBJS-$(CONFIG_CMD_NET) += xemacps_g.o xemacps_control.o \
-               xemacps_sinit.o xemacps_bdring.o \
-               xemacps.o xgmac.o
-
 COBJS  := $(sort $(COBJS-y))
 
 SOBJS  := lowlevel_init.o

diff --git a/board/xilinx/zynq_common/board.c b/board/xilinx/zynq_common/board.c
index 6a029fd11c185fbd9f18968dcb84f287809dd59e..212f96cfae494e90649a6e99b0890ca826ca73ee 100644 (file)
--- a/board/xilinx/zynq_common/board.c
+++ b/board/xilinx/zynq_common/board.c
@@ -671,7 +671,7 @@ int board_late_init (void)
 #ifdef CONFIG_CMD_NET
 int board_eth_init(bd_t *bis)
 {
-       return Xgmac_register(bis);
+       return zynq_gem_initialize(bis);
 }
 #endif
 

diff --git a/board/xilinx/zynq_common/xgmac.h b/board/xilinx/zynq_common/xgmac.h
deleted file mode 100644 (file)
index 58b2252..0000000
--- a/board/xilinx/zynq_common/xgmac.h
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * Harvested from Cadence driver.
- */
-
-#ifndef __XZYNQETH_H__
-#define __XZYNQETH_H__
-
-#define XZYNQETH_RX_BUF_SIZE 128
-
-#define XZYNQETH_RBQ_LENGTH 128
-#define XZYNQETH_TBQ_LENGTH 128
-
-#define XZYNQETH_MDIO_ENABLED (GEM_MDIO_EN)
-
-#define XZYNQETH_DEF_PCLK_DIV (MDC_DIV_32)
-
-#define XZYNQETH_DEF_AHB_WIDTH (AMBA_AHB_32)
-
-#define XZYNQETH_DEF_DUPLEX (GEM_FULL_DUPLEX)
-
-#define XZYNQETH_DEF_SPEED (SPEED_100M)
-
-#define XZYNQETH_DEF_LOOP (LB_NONE)
-
-#define XZYNQETH_READ_SNAP       (1<<14)     /* Read snapshot register */
-#define XZYNQETH_TAKE_SNAP       (1<<13)     /* Take a snapshot */
-/* Transmit zero quantum pause frame */
-#define XZYNQETH_TX_0Q_PAUSE     (1<<12)
-#define XZYNQETH_TX_PAUSE        (1<<11)     /* Transmit pause frame */
-/* Halt transmission after curr frame */
-#define XZYNQETH_TX_HALT         (1<<10)
-#define XZYNQETH_TX_START        (1<<9)      /* Start tx (tx_go) */
-/* Enable writing to stat registers */
-#define XZYNQETH_STATS_WR_EN     (1<<7)
-#define XZYNQETH_STATS_INC       (1<<6)      /* Increment statistic registers */
-#define XZYNQETH_STATS_CLR       (1<<5)      /* Clear statistic registers */
-#define XZYNQETH_MDIO_EN         (1<<4)      /* Enable MDIO port */
-#define XZYNQETH_TX_EN           (1<<3)      /* Enable transmit circuits */
-#define XZYNQETH_RX_EN           (1<<2)      /* Enable receive circuits */
-#define XZYNQETH_LB_MAC          (1<<1)      /* Perform local loopback at MAC */
-/* Perform ext loopback through PHY */
-#define XZYNQETH_LB_PHY          (1<<0)
-
-/* Do not copy pause frames to memory */
-#define XZYNQETH_RX_NO_PAUSE     (1<<23)
-#define XZYNQETH_AHB_WIDTH1      (1<<22)     /* Bit 1 for defining AHB width */
-#define XZYNQETH_AHB_WIDTH0      (1<<21)     /* Bit 0 for defining AHB width */
-#define XZYNQETH_MDC_DIV2        (1<<20)     /* PCLK divisor for MDC, bit 2 */
-#define XZYNQETH_MDC_DIV1        (1<<19)     /* PCLK divisor for MDC, bit 1 */
-#define XZYNQETH_MDC_DIV0        (1<<18)     /* PCLK divisor for MDC, bit 0 */
-/* Discard FCS from received frames. */
-#define XZYNQETH_RX_NO_FCS       (1<<17)
-#define XZYNQETH_RX_LEN_CHK      (1<<16)     /* Receive length check. */
-/* Pos of LSB for rx buffer offsets. */
-#define XZYNQETH_RX_OFFSET_BASE  14
-/* RX offset bit 1 */
-#define XZYNQETH_RX_OFFSET1      (1<<(GEM_RX_OFFSET_BASE + 1))
-/* RX offset bit 0 */
-#define XZYNQETH_RX_OFFSET0      (1<<GEM_RX_OFFSET_BASE)
-#define XZYNQETH_RX_PAUSE_EN     (1<<13)     /* Enable pause reception */
-/* Retry test for speeding up debug */
-#define XZYNQETH_RETRY_TEST      (1<<12)
-#define XZYNQETH_PCS_SEL         (1<<11)     /* Select PCS */
-#define XZYNQETH_GIG_MODE        (1<<10)     /* Gigabit mode enable */
-#define XZYNQETH_EAM_EN          (1<<9)      /* External address match enable */
-/* Enable 1536 byte frames reception */
-#define XZYNQETH_FRAME_1536      (1<<8)
-#define XZYNQETH_UNICAST_EN      (1<<7)      /* Receive unicast hash frames */
-#define XZYNQETH_MULTICAST_EN    (1<<6)      /* Receive multicast hash frames */
-/* Do not receive broadcast frames */
-#define XZYNQETH_NO_BROADCAST    (1<<5)
-#define XZYNQETH_COPY_ALL        (1<<4)      /* Copy all frames */
-#define XZYNQETH_RX_JUMBO        (1<<3)      /* Allow jumbo frame reception */
-#define XZYNQETH_VLAN_ONLY       (1<<2)      /* Receive only VLAN frames */
-#define XZYNQETH_FULL_DUPLEX     (1<<1)      /* Enable full duplex */
-#define XZYNQETH_SPEED_100       (1<<0)      /* Set to 100Mb mode */
-
-#define XZYNQETH_PHY_IDLE        (1<<2)      /* PHY management is idle */
-#define XZYNQETH_MDIO_IN         (1<<1)      /* Status of mdio_in pin */
-#define XZYNQETH_LINK_STATUS     (1<<0)      /* Status of link pin */
-
-#define XZYNQETH_TX_HRESP        (1<<8)      /* Transmit hresp not OK */
-#define XZYNQETH_LATE_COL        (1<<7)      /* Late collision */
-#define XZYNQETH_TX_URUN         (1<<6)      /* Transmit underrun occurred */
-#define XZYNQETH_TX_COMPLETE     (1<<5)      /* Transmit completed OK */
-/* Transmit buffs exhausted mid frame */
-#define XZYNQETH_TX_BUF_EXH      (1<<4)
-/* Status of tx_go internal variable */
-#define XZYNQETH_TX_GO           (1<<3)
-#define XZYNQETH_TX_RETRY_EXC    (1<<2)      /* Retry limit exceeded */
-/* Collision occurred during frame tx */
-#define XZYNQETH_TX_COL          (1<<1)
-#define XZYNQETH_TX_USED         (1<<0)      /* Used bit read in tx buffer */
-
-#define XZYNQETH_RX_HRESP        (1<<3)      /* Receive hresp not OK */
-#define XZYNQETH_RX_ORUN         (1<<2)      /* Receive overrun occurred */
-#define XZYNQETH_RX_DONE         (1<<1)      /* Frame successfully received */
-#define XZYNQETH_RX_BUF_USED     (1<<0)      /* Receive buffer used bit read */
-
-#define XZYNQETH_IRQ_PCS_AN      (1<<16)     /* PCS autonegotiation complete */
-/* External interrupt pin triggered */
-#define XZYNQETH_IRQ_EXT_INT     (1<<15)
-#define XZYNQETH_IRQ_PAUSE_TX    (1<<14)     /* Pause frame transmitted */
-#define XZYNQETH_IRQ_PAUSE_0     (1<<13)     /* Pause time has reached zero */
-#define XZYNQETH_IRQ_PAUSE_RX    (1<<12)     /* Pause frame received */
-#define XZYNQETH_IRQ_HRESP       (1<<11)     /* hresp not ok */
-#define XZYNQETH_IRQ_RX_ORUN     (1<<10)     /* Receive overrun occurred */
-#define XZYNQETH_IRQ_PCS_LINK    (1<<9)      /* Status of PCS link changed */
-#define XZYNQETH_IRQ_TX_DONE     (1<<7)      /* Frame transmitted ok */
-/* Transmit err occurred or no buffers*/
-#define XZYNQETH_IRQ_TX_ERROR    (1<<6)
-#define XZYNQETH_IRQ_RETRY_EXC   (1<<5)      /* Retry limit exceeded */
-#define XZYNQETH_IRQ_TX_URUN     (1<<4)      /* Transmit underrun occurred */
-#define XZYNQETH_IRQ_TX_USED     (1<<3)      /* Tx buffer used bit read */
-#define XZYNQETH_IRQ_RX_USED     (1<<2)      /* Rx buffer used bit read */
-#define XZYNQETH_IRQ_RX_DONE     (1<<1)      /* Frame received ok */
-/* PHY management operation complete */
-#define XZYNQETH_IRQ_MAN_DONE    (1<<0)
-#define XZYNQETH_IRQ_ALL         (0xFFFFFFFF)/* Everything! */
-
-#define XZYNQETH_TBQE_USED       (1<<31)     /* Used bit. */
-#define XZYNQETH_TBQE_WRAP       (1<<30)     /* Wrap bit */
-#define XZYNQETH_TBQE_RETRY_EXC  (1<<29)     /* Retry limit exceeded. */
-#define XZYNQETH_TBQE_URUN       (1<<28)     /* Transmit underrun occurred. */
-#define XZYNQETH_TBQE_BUF_EXH    (1<<27)     /* Buffers exhausted mid frame. */
-#define XZYNQETH_TBQE_LATE_COL   (1<<26)     /* Late collision. */
-#define XZYNQETH_TBQE_NO_CRC     (1<<16)     /* No CRC */
-#define XZYNQETH_TBQE_LAST_BUF   (1<<15)     /* Last buffer */
-#define XZYNQETH_TBQE_LEN_MASK   (0x3FFF)    /* Mask for length field */
-#define XZYNQETH_TX_MAX_LEN      (0x3FFF)    /* Maximum transmit length value */
-/* Dummy value to check for free buffer*/
-#define XZYNQETH_TBQE_DUMMY      (0x8000BFFF)
-
-#define XZYNQETH_RBQE_BROADCAST  (1<<31)     /* Broadcast frame */
-#define XZYNQETH_RBQE_MULTICAST  (1<<30)     /* Multicast hashed frame */
-#define XZYNQETH_RBQE_UNICAST    (1<<29)     /* Unicast hashed frame */
-#define XZYNQETH_RBQE_EXT_ADDR   (1<<28)     /* External address match */
-#define XZYNQETH_RBQE_SPEC_MATCH (1<<27)     /* Specific address matched */
-/* Pos for base of specific match */
-#define XZYNQETH_RBQE_SPEC_BASE  (25)
-#define XZYNQETH_RBQE_SPEC_MAT1  (1<<(RBQE_SPEC_BASE + 1))
-#define XZYNQETH_RBQE_SPEC_MAT0  (1<<RBQE_SPEC_BASE)
-#define XZYNQETH_RBQE_TYPE_MATCH (1<<24)     /* Type ID matched */
-/* Position for base of type id match */
-#define XZYNQETH_RBQE_TYPE_BASE  (22)
-#define XZYNQETH_RBQE_TYPE_MAT1  (1<<(RBQE_TYPE_BASE + 1))
-#define XZYNQETH_RBQE_TYPE_MAT0  (1<<RBQE_TYPE_BASE)
-#define XZYNQETH_RBQE_VLAN       (1<<21)     /* VLAN tagged */
-#define XZYNQETH_RBQE_PRIORITY   (1<<20)     /* Priority tagged */
-/* Position for base of VLAN priority */
-#define XZYNQETH_RBQE_VLAN_BASE  (17)
-#define XZYNQETH_RBQE_VLAN_P2    (1<<(RBQE_VLAN_BASE+2))
-#define XZYNQETH_RBQE_VLAN_P1    (1<<(RBQE_VLAN_BASE+1))
-#define XZYNQETH_RBQE_VLAN_P0    (1<<RBQE_VLAN_BASE)
-#define XZYNQETH_RBQE_CFI        (1<<16)     /* CFI frame */
-#define XZYNQETH_RBQE_EOF        (1<<15)     /* End of frame. */
-#define XZYNQETH_RBQE_SOF        (1<<14)     /* Start of frame. */
-#define XZYNQETH_RBQE_LEN_MASK   (0x3FFF)    /* Mask for the length field. */
-#define XZYNQETH_RBQE_WRAP       (1<<1)      /* Wrap bit.. */
-#define XZYNQETH_RBQE_USED       (1<<0)      /* Used bit.. */
-#define XZYNQETH_RBQE_ADD_MASK   (0xFFFFFFFC)/* Mask for address */
-
-#define XZYNQETH_REV_ID_MODEL_MASK   (0x000F0000)    /* Model ID */
-#define XZYNQETH_REV_ID_MODEL_BASE   (16)            /* For Shifting */
-#define XZYNQETH_REV_ID_REG_MODEL    (0x00020000)    /* GEM module ID */
-#define XZYNQETH_REV_ID_REV_MASK     (0x0000FFFF)    /* Revision ID */
-
-#define XZYNQETH_NET_CONTROL         (0x00)
-#define XZYNQETH_NET_CONFIG          (0x04)
-#define XZYNQETH_NET_STATUS          (0x08)
-#define XZYNQETH_USER_IO             (0x0C)
-#define XZYNQETH_TX_STATUS           (0x14)
-#define XZYNQETH_RX_QPTR             (0x18)
-#define XZYNQETH_TX_QPTR             (0x1C)
-#define XZYNQETH_RX_STATUS           (0x20)
-#define XZYNQETH_IRQ_STATUS          (0x24)
-#define XZYNQETH_IRQ_ENABLE          (0x28)
-#define XZYNQETH_IRQ_DISABLE         (0x2C)
-#define XZYNQETH_IRQ_MASK            (0x30)
-#define XZYNQETH_PHY_MAN             (0x34)
-#define XZYNQETH_RX_PAUSE_TIME       (0x38)
-#define XZYNQETH_TX_PAUSE_QUANT      (0x3C)
-
-#define XZYNQETH_HASH_BOT            (0x80)
-#define XZYNQETH_HASH_TOP            (0x84)
-#define XZYNQETH_LADDR1_BOT          (0x88)
-#define XZYNQETH_LADDR1_TOP          (0x8C)
-#define XZYNQETH_LADDR2_BOT          (0x90)
-#define XZYNQETH_LADDR2_TOP          (0x94)
-#define XZYNQETH_LADDR3_BOT          (0x98)
-#define XZYNQETH_LADDR3_TOP          (0x9C)
-#define XZYNQETH_LADDR4_BOT          (0xA0)
-#define XZYNQETH_LADDR4_TOP          (0xA4)
-#define XZYNQETH_ID_CHECK1           (0xA8)
-#define XZYNQETH_ID_CHECK2           (0xAC)
-#define XZYNQETH_ID_CHECK3           (0xB0)
-#define XZYNQETH_ID_CHECK4           (0xB4)
-#define XZYNQETH_REV_ID              (0xFC)
-
-#define XZYNQETH_OCT_TX_BOT          (0x100)
-#define XZYNQETH_OCT_TX_TOP          (0x104)
-#define XZYNQETH_STATS_FRAMES_TX     (0x108)
-#define XZYNQETH_BROADCAST_TX        (0x10C)
-#define XZYNQETH_MULTICAST_TX        (0x110)
-#define XZYNQETH_STATS_PAUSE_TX      (0x114)
-#define XZYNQETH_FRAME64_TX          (0x118)
-#define XZYNQETH_FRAME65_TX          (0x11C)
-#define XZYNQETH_FRAME128_TX         (0x120)
-#define XZYNQETH_FRAME256_TX         (0x124)
-#define XZYNQETH_FRAME512_TX         (0x128)
-#define XZYNQETH_FRAME1024_TX        (0x12C)
-#define XZYNQETH_FRAME1519_TX        (0x130)
-#define XZYNQETH_STATS_TX_URUN       (0x134)
-#define XZYNQETH_STATS_SINGLE_COL    (0x138)
-#define XZYNQETH_STATS_MULTI_COL     (0x13C)
-#define XZYNQETH_STATS_EXCESS_COL    (0x140)
-#define XZYNQETH_STATS_LATE_COL      (0x144)
-#define XZYNQETH_STATS_DEF_TX        (0x148)
-#define XZYNQETH_STATS_CRS_ERRORS    (0x14C)
-#define XZYNQETH_OCT_RX_BOT          (0x150)
-#define XZYNQETH_OCT_RX_TOP          (0x154)
-#define XZYNQETH_STATS_FRAMES_RX     (0x158)
-#define XZYNQETH_BROADCAST_RX        (0x15C)
-#define XZYNQETH_MULTICAST_RX        (0x160)
-#define XZYNQETH_STATS_PAUSE_RX      (0x164)
-#define XZYNQETH_FRAME64_RX          (0x168)
-#define XZYNQETH_FRAME65_RX          (0x16C)
-#define XZYNQETH_FRAME128_RX         (0x170)
-#define XZYNQETH_FRAME256_RX         (0x174)
-#define XZYNQETH_FRAME512_RX         (0x178)
-#define XZYNQETH_FRAME1024_RX        (0x17C)
-#define XZYNQETH_FRAME1519_RX        (0x180)
-#define XZYNQETH_STATS_USIZE_FRAMES  (0x184)
-#define XZYNQETH_STATS_EXCESS_LEN    (0x188)
-#define XZYNQETH_STATS_JABBERS       (0x18C)
-#define XZYNQETH_STATS_FCS_ERRORS    (0x190)
-#define XZYNQETH_STATS_LENGTH_ERRORS (0x194)
-#define XZYNQETH_STATS_RX_SYM_ERR    (0x198)
-#define XZYNQETH_STATS_ALIGN_ERRORS  (0x19C)
-#define XZYNQETH_STATS_RX_RES_ERR    (0x1a0)
-#define XZYNQETH_STATS_RX_ORUN       (0x1a4)
-
-#define XZYNQETH_REG_TOP             (0x23C)
-
-#define gem_get_tbq_end(mac)    ((mac)->tbq_end)
-#define gem_get_tbq_current(mac)    ((mac)->tbq_current)
-
-#define gem_get_rbq_end(mac)    ((mac)->rbq_end)
-#define gem_get_rbq_current(mac)    ((mac)->rbq_current)
-
-#define gem_check_free_tbq_buf(mac) \
-
-#define gem_check_a_free_tbq_buf(mac, index) \
-
-#define gem_get_free_tbq_num(mac, free_tbq_num) \
-

diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index fd9d0b4be115a10674f1ab5d9cdd5909c966dfa3..24d860d4cd76753d3b2c5b16db37a1df0641c71c 100644 (file)
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -84,6 +84,8 @@ COBJS-$(CONFIG_TSI108_ETH) += tsi108_eth.o
 COBJS-$(CONFIG_ULI526X) += uli526x.o
 COBJS-$(CONFIG_VSC7385_ENET) += vsc7385.o
 COBJS-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
+COBJS-$(CONFIG_ZYNQ_GEM) += zynq_gem.o zynq_gem_bdring.o zynq_gem_control.o \
+                       zynq_gem_g.o zynq_gem_sinit.o zynq_gem_wrap.o
 
 COBJS  := $(sort $(COBJS-y))
 SRCS   := $(COBJS:.o=.c)

diff --git a/board/xilinx/zynq_common/xemacps.c b/drivers/net/zynq_gem.c
similarity index 99%
rename from board/xilinx/zynq_common/xemacps.c
rename to drivers/net/zynq_gem.c
index b28af0f18860f4620b1156cc5f127160bbd4367f..32c6548415bb122ae515a37f012c648b784baac4 100644 (file)
--- a/board/xilinx/zynq_common/xemacps.c
+++ b/drivers/net/zynq_gem.c
@@ -41,10 +41,10 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacps.c
+* @file zynq_gem.c
 *
 * The XEmacPss driver. Functions in this file are the minimum required functions
-* for this driver. See xemacps.h for a detailed description of the driver.
+* for this driver. See zynq_gem.h for a detailed description of the driver.
 *
 * <pre>
 * MODIFICATION HISTORY:
@@ -57,7 +57,7 @@
 
 /***************************** Include Files *********************************/
 
-#include "xemacps.h"
+#include "zynq_gem.h"
 
 /************************** Constant Definitions *****************************/
 

diff --git a/board/xilinx/zynq_common/xemacps.h b/drivers/net/zynq_gem.h
similarity index 98%
rename from board/xilinx/zynq_common/xemacps.h
rename to drivers/net/zynq_gem.h
index 08e2de4db7c66084187441c5fe46dc02da0cc440..912d2c1841cf7d6fc6ac03338afbf6d2116464fd 100644 (file)
--- a/board/xilinx/zynq_common/xemacps.h
+++ b/drivers/net/zynq_gem.h
@@ -41,7 +41,7 @@
 /****************************************************************************/
 /**
  *
- * @file xemacps.h
+ * @file zynq_gem.h
  *
  * The Xilinx Embedded Processor Block Ethernet driver.
  *
@@ -117,7 +117,7 @@
  *
  * This API requires the user to understand how the DMA operates. The
  * following paragraphs provide some explanation, but the user is encouraged
- * to read documentation in xemacps_bdring.h as well as study example code
+ * to read documentation in zynq_gem_bdring.h as well as study example code
  * that accompanies this driver.
  *
  * The API is designed to get BDs to and from the DMA engine in the most
@@ -174,7 +174,7 @@
  * <b>Alignment & Data Cache Restrictions</b>
  *
  * Due to the design of the hardware, all RX buffers, BDs need to be 4-byte
- * aligned. Please reference xemacps_bd.h for cache related macros.
+ * aligned. Please reference zynq_gem_bd.h for cache related macros.
  *
  * DMA Tx:
  *
@@ -289,9 +289,9 @@ extern "C" {
 
 #include "xbasic_types.h"
 #include "xstatus.h"
-#include "xemacps_hw.h"
-#include "xemacps_bd.h"
-#include "xemacps_bdring.h"
+#include "zynq_gem_hw.h"
+#include "zynq_gem_bd.h"
+#include "zynq_gem_bdring.h"
 
 /************************** Constant Definitions ****************************/
 
@@ -430,7 +430,7 @@ extern "C" {
  * @param CallBackRef is user data assigned when the callback was set.
  *
  * @note
- * See xemacps_hw.h for bitmasks definitions and the device hardware spec for
+ * See zynq_gem_hw.h for bitmasks definitions and the device hardware spec for
  * further information on their meaning.
  *
  */
@@ -632,7 +632,7 @@ typedef struct XEmacPss {
 /************************** Function Prototypes *****************************/
 
 /*
- * Initialization functions in xemacps.c
+ * Initialization functions in zynq_gem.c
  */
 int XEmacPss_CfgInitialize(XEmacPss *InstancePtr, XEmacPss_Config *CfgPtr,
                           u32 EffectiveAddress);
@@ -641,7 +641,7 @@ void XEmacPss_Stop(XEmacPss *InstancePtr);
 void XEmacPss_Reset(XEmacPss *InstancePtr);
 
 /*
- * Lookup configuration in xemacps_sinit.c
+ * Lookup configuration in zynq_gem_sinit.c
  */
 XEmacPss_Config *XEmacPss_LookupConfig(u16 DeviceId);
 
@@ -654,7 +654,7 @@ int XEmacPss_SetHandler(XEmacPss *InstancePtr, u32 HandlerType,
 void XEmacPss_IntrHandler(void *InstancePtr);
 
 /*
- * MAC configuration/control functions in XEmacPss_control.c
+ * MAC configuration/control functions in zynq_gem_control.c
  */
 int XEmacPss_SetOptions(XEmacPss *InstancePtr, u32 Options);
 int XEmacPss_ClearOptions(XEmacPss *InstancePtr, u32 Options);

diff --git a/board/xilinx/zynq_common/xemacps_bd.h b/drivers/net/zynq_gem_bd.h
similarity index 99%
rename from board/xilinx/zynq_common/xemacps_bd.h
rename to drivers/net/zynq_gem_bd.h
index 74778b2c24d6ea1dc71749d4741d7c469293073b..c2f0d2ad214058e74c64c627d08731c7ce61e9b7 100644 (file)
--- a/board/xilinx/zynq_common/xemacps_bd.h
+++ b/drivers/net/zynq_gem_bd.h
@@ -41,7 +41,7 @@
 /*****************************************************************************/
 /**
  *
- * @file xemacps_bd.h
+ * @file zynq_gem_bd.h
  *
  * This header provides operations to manage buffer descriptors in support
  * of scatter-gather DMA.

diff --git a/board/xilinx/zynq_common/xemacps_bdring.c b/drivers/net/zynq_gem_bdring.c
similarity index 99%
rename from board/xilinx/zynq_common/xemacps_bdring.c
rename to drivers/net/zynq_gem_bdring.c
index 8224d62e9c39894ba32a8d60ed7c89661b074b68..58134b2d206851668fd270c4174ab5f9a64dde15 100644 (file)
--- a/board/xilinx/zynq_common/xemacps_bdring.c
+++ b/drivers/net/zynq_gem_bdring.c
@@ -41,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacps_bdring.c
+* @file zynq_gem_bdring.c
 *
 * This file implements buffer descriptor ring related functions.
 *
@@ -58,9 +58,9 @@
 
 #include "xstatus.h"
 //#include "xcache.h"
-#include "xemacps_hw.h"
-#include "xemacps_bd.h"
-#include "xemacps_bdring.h"
+#include "zynq_gem_hw.h"
+#include "zynq_gem_bd.h"
+#include "zynq_gem_bdring.h"
 
 /************************** Constant Definitions *****************************/
 
@@ -415,7 +415,7 @@ int XEmacPss_BdRingClone(XEmacPss_BdRing * RingPtr, XEmacPss_Bd * SrcBdPtr,
  *        XEmacPss_BdRingToHw(MyRingPtr, NumBd1, MySet1);
  * </pre>
  *
- * Use the API defined in xemacps_bd.h to modify individual BDs. Traversal
+ * Use the API defined in zynq_gem_bd.h to modify individual BDs. Traversal
  * of the BD set can be done using XEmacPss_BdRingNext() and
  * XEmacPss_BdRingPrev().
  *

diff --git a/board/xilinx/zynq_common/xemacps_bdring.h b/drivers/net/zynq_gem_bdring.h
similarity index 99%
rename from board/xilinx/zynq_common/xemacps_bdring.h
rename to drivers/net/zynq_gem_bdring.h
index 9beaae6a91fecc7c5798bebfaa1a5516f2e5b2cd..e97284de44df331f48f1b2f663c777dde831de96 100644 (file)
--- a/board/xilinx/zynq_common/xemacps_bdring.h
+++ b/drivers/net/zynq_gem_bdring.h
@@ -41,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacps_bdring.h
+* @file zynq_gem_bdring.h
 *
 * The Xiline EmacPss Buffer Descriptor ring driver. This is part of EmacPss
 * DMA functionalities.
@@ -213,7 +213,7 @@ typedef struct {
 /************************** Function Prototypes ******************************/
 
 /*
- * Scatter gather DMA related functions in xemacps_bdring.c
+ * Scatter gather DMA related functions in zynq_gem_bdring.c
  */
 int XEmacPss_BdRingCreate(XEmacPss_BdRing * RingPtr, u32 PhysAddr,
                          u32 VirtAddr, u32 Alignment, unsigned BdCount);

diff --git a/board/xilinx/zynq_common/xemacps_control.c b/drivers/net/zynq_gem_control.c
similarity index 99%
rename from board/xilinx/zynq_common/xemacps_control.c
rename to drivers/net/zynq_gem_control.c
index 1f605cb3d0a041d9f6aac18ee5e5a4645f908f0c..316139d0208c0abaa472f203415ee658d48006b0 100644 (file)
--- a/board/xilinx/zynq_common/xemacps_control.c
+++ b/drivers/net/zynq_gem_control.c
@@ -41,10 +41,10 @@
 /*****************************************************************************/
 /**
  *
- * @file xemacps_control.c
+ * @file zynq_gem_control.c
  *
  * Functions in this file implement general purpose command and control related
- * functionality. See xemacps.h for a detailed description of the driver.
+ * functionality. See zynq_gem.h for a detailed description of the driver.
  *
  * <pre>
  * MODIFICATION HISTORY:
@@ -57,7 +57,7 @@
 
 /***************************** Include Files *********************************/
 
-#include "xemacps.h"
+#include "zynq_gem.h"
 
 /************************** Constant Definitions *****************************/
 
@@ -371,7 +371,7 @@ int XEmacPss_SetTypeIdCheck(XEmacPss *InstancePtr, u32 Id_Check, u8 Index)
  * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
  *
  * @note
- * See xemacps.h for a description of the available options.
+ * See zynq_gem.h for a description of the available options.
  *
  *****************************************************************************/
 int XEmacPss_SetOptions(XEmacPss *InstancePtr, u32 Options)
@@ -506,7 +506,7 @@ int XEmacPss_SetOptions(XEmacPss *InstancePtr, u32 Options)
  * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
  *
  * @note
- * See xemacps.h for a description of the available options.
+ * See zynq_gem.h for a description of the available options.
  *
  *****************************************************************************/
 int XEmacPss_ClearOptions(XEmacPss *InstancePtr, u32 Options)
@@ -638,7 +638,7 @@ int XEmacPss_ClearOptions(XEmacPss *InstancePtr, u32 Options)
  * as a set opion.
  *
  * @note
- * See xemacps.h for a description of the available options.
+ * See zynq_gem.h for a description of the available options.
  *
  *****************************************************************************/
 u32 XEmacPss_GetOptions(XEmacPss *InstancePtr)

diff --git a/board/xilinx/zynq_common/xemacps_g.c b/drivers/net/zynq_gem_g.c
similarity index 98%
rename from board/xilinx/zynq_common/xemacps_g.c
rename to drivers/net/zynq_gem_g.c
index f3ab32168b492855facb91685f2a1909650c96c4..149d317519d701088158b26c3db2c54cb924e31b 100644 (file)
--- a/board/xilinx/zynq_common/xemacps_g.c
+++ b/drivers/net/zynq_gem_g.c
@@ -41,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacps_g.c
+* @file zynq_gem_g.c
 *
 * This file contains a configuration table that specifies the configuration of
 * ethernet devices in the system.
@@ -65,7 +65,7 @@
 
 /***************************** Include Files *********************************/
 
-#include "xemacps.h"
+#include "zynq_gem.h"
 
 /************************** Constant Definitions *****************************/
 

diff --git a/board/xilinx/zynq_common/xemacps_hw.h b/drivers/net/zynq_gem_hw.h
similarity index 99%
rename from board/xilinx/zynq_common/xemacps_hw.h
rename to drivers/net/zynq_gem_hw.h
index 24b3442cf01d327aa2f662f7374a2918b9295e52..4e11d2198fe5ed47a52958358bf94687fd87e976 100644 (file)
--- a/board/xilinx/zynq_common/xemacps_hw.h
+++ b/drivers/net/zynq_gem_hw.h
@@ -41,11 +41,11 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacps_hw.h
+* @file zynq_gem_hw.h
 *
 * This header file contains identifiers and low-level driver functions (or
 * macros) that can be used to access the PSS Ethernet MAC (XEmacPss) device.
-* High-level driver functions are defined in xemacps.h.
+* High-level driver functions are defined in zynq_gem.h.
 *
 * @note
 *
@@ -528,7 +528,7 @@ typedef enum { XMDC_DIV_8 = 0, XMDC_DIV_16, XMDC_DIV_32, XMDC_DIV_48,
  * Define appropriate I/O access method to mempry mapped I/O or other
  * intarfce if necessary.
  */
-/* Defined in xemacps_control.c*/
+/* Defined in zynq_gem_control.c*/
 void XIo_Out32(u32 OutAddress, u32 Value);
 u32 XIo_In32(u32 InAddress);
 

diff --git a/board/xilinx/zynq_common/xemacps_sinit.c b/drivers/net/zynq_gem_sinit.c
similarity index 98%
rename from board/xilinx/zynq_common/xemacps_sinit.c
rename to drivers/net/zynq_gem_sinit.c
index dd05508171633d26aa3aa6e822e7ab579b5b23f6..1af1e0c646ffeb011246eb59ec3f6ed0ee6cc7d3 100644 (file)
--- a/board/xilinx/zynq_common/xemacps_sinit.c
+++ b/drivers/net/zynq_gem_sinit.c
@@ -41,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacps_sinit.c
+* @file zynq_gem_sinit.c
 *
 * This file contains lookup method by device ID when success, it returns
 * pointer to config table to be used to initialize the device.
@@ -58,7 +58,7 @@
 
 /***************************** Include Files *********************************/
 
-#include "xemacps.h"
+#include "zynq_gem.h"
 
 /************************** Constant Definitions *****************************/
 

diff --git a/board/xilinx/zynq_common/xgmac.c b/drivers/net/zynq_gem_wrap.c
similarity index 99%
rename from board/xilinx/zynq_common/xgmac.c
rename to drivers/net/zynq_gem_wrap.c
index 5c7484b2cf14fa936b4bc4953e9018517c5fd3c0..5b1f06ce6dffdb89f8242aff535add2c1eaf259f 100644 (file)
--- a/board/xilinx/zynq_common/xgmac.c
+++ b/drivers/net/zynq_gem_wrap.c
@@ -6,7 +6,7 @@
 #include <miiphy.h>
 #include <net.h>
 
-#include "xemacps.h"
+#include "zynq_gem.h"
 
 /************************ Forward function declaration **********************/
 
@@ -58,7 +58,7 @@ XEmacPss EmacPssInstance;
 /*
 *      Following are the supporting functions to read and write GEM PHY registers.
 */
-int Xgmac_phy_mgmt_idle(XEmacPss * EmacPssInstancePtr)
+static int Xgmac_phy_mgmt_idle(XEmacPss * EmacPssInstancePtr)
 {
        return ((XEmacPss_ReadReg
                 (EmacPssInstancePtr->Config.BaseAddress, XEMACPSS_NWSR_OFFSET)
@@ -508,7 +508,7 @@ static int Xgmac_write_hwaddr(struct eth_device *dev)
        return 0;
 }
 
-int Xgmac_register(bd_t *bis)
+int zynq_gem_initialize(bd_t *bis)
 {
        struct eth_device *dev;
        dev = malloc(sizeof(*dev));
@@ -516,10 +516,10 @@ int Xgmac_register(bd_t *bis)
                return 1;
 
        memset(dev, 0, sizeof(*dev));
-       sprintf(dev->name, "xgmac");
+       sprintf(dev->name, "zynq_gem");
 
        if (Xgmac_one_time_init() < 0) {
-               printf("xgmac init failed!");
+               printf("zynq_gem init failed!");
                return -1;
        }
        dev->iobase = EmacPssInstance.Config.BaseAddress;

diff --git a/include/configs/zynq_ep107.h b/include/configs/zynq_ep107.h
index be454265283249b67613c517ed32b41c18d60e4d..4e81ad7de587676b076db8364ce6fb42cbc33b9a 100644 (file)
--- a/include/configs/zynq_ep107.h
+++ b/include/configs/zynq_ep107.h
@@ -73,6 +73,7 @@
 # define CONFIG_UART0
 #define CONFIG_TTC0
 #define CONFIG_GEM0
+#define CONFIG_ZYNQ_GEM
 #define CONFIG_NET_MULTI
 #define CONFIG_XGMAC_PHY_ADDR 0x17
 

diff --git a/include/configs/zynq_zc702.h b/include/configs/zynq_zc702.h
index a57b9b1fb0847c569281c15772c99aa531fdd679..dfeda24f21688eb880395d66c6fbc371d4af6475 100644 (file)
--- a/include/configs/zynq_zc702.h
+++ b/include/configs/zynq_zc702.h
@@ -48,6 +48,7 @@
 #define CONFIG_UART1
 #define CONFIG_TTC0
 #define CONFIG_GEM0
+#define CONFIG_ZYNQ_GEM
 #define CONFIG_NET_MULTI
 #define CONFIG_XGMAC_PHY_ADDR 0x7
 

diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h
index a444ea5147f271be5f56ba6f69167aec1d776508..9cf2cdcf6bd45b06c426febd304bff7e14d70be5 100644 (file)
--- a/include/configs/zynq_zc770.h
+++ b/include/configs/zynq_zc770.h
@@ -94,6 +94,7 @@
  */
 #if defined(CONFIG_ZC770_XM010) || defined(CONFIG_ZC770_XM013)
 #define CONFIG_CMD_PING
+#define CONFIG_ZYNQ_GEM
 #define CONFIG_NET_MULTI
 #define CONFIG_XGMAC_PHY_ADDR 0x7
 #else

diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h
index 3e922288a07765081e76341ac28b9041f68551b8..d8e6525c624ee485944e5d2fc448df2445c29804 100644 (file)
--- a/include/configs/zynq_zed.h
+++ b/include/configs/zynq_zed.h
@@ -85,8 +85,9 @@
 # define CONFIG_UART1
 #define CONFIG_TTC0
 #define CONFIG_GEM0
-#define CONFIG_XGMAC_PHY_ADDR 0
+#define CONFIG_ZYNQ_GEM
 #define CONFIG_NET_MULTI
+#define CONFIG_XGMAC_PHY_ADDR 0
 
 /*
  * Physical Memory map

diff --git a/include/netdev.h b/include/netdev.h
index 303af0334139ed071700c08c90736236c637ecee..0c263f32f64f88b67f262f62bb469c6a14428489 100644 (file)
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -94,7 +94,7 @@ int xilinx_emaclite_initialize (bd_t *bis, int base_addr);
 int sh_eth_initialize(bd_t *bis);
 int dm9000_initialize(bd_t *bis);
 int fecmxc_initialize(bd_t *bis);
-int Xgmac_register(bd_t *bis);
+int zynq_gem_initialize(bd_t *bis);
 
 /* Boards with PCI network controllers can call this from their board_eth_init()
  * function to initialize whatever's on board.