]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: ti: k3-j784s4-ti-ipc-firmware: Refactor IPC cfg into new dtsi
authorBeleswar Padhi <b-padhi@ti.com>
Mon, 8 Sep 2025 14:28:20 +0000 (19:58 +0530)
committerNishanth Menon <nm@ti.com>
Fri, 12 Sep 2025 04:15:31 +0000 (09:45 +0530)
The TI K3 J784S4 SoCs have multiple programmable remote processors like
R5F, C7x etc. The TI SDKs for J784S4 SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.

While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.

This patch only refactors the C71_3 remote processor related nodes into
the new dtsi. All other nodes have been refactored in the previous
commit as part of k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-29-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am69-sk.dts
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi [new file with mode: 0644]

index 3be74d828d84c665e5ade8820e1a69f09a003ea1..5896e57b5b9ed62ceace4bc961505247dc86457e 100644 (file)
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               c71_3_dma_memory_region: memory@ab000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xab000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_3_memory_region: memory@ab100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xab100000 0x00 0xf00000>;
-                       no-map;
-               };
        };
 
        vusb_main: regulator-vusb-main5v0 {
        bootph-all;
 };
 
-&mailbox0_cluster5 {
-       mbox_c71_3: mbox-c71-3 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
 &wkup_uart0 {
        /* Firmware usage */
        status = "reserved";
        bootph-all;
 };
 
-&c71_3 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
-       memory-region = <&c71_3_dma_memory_region>,
-                       <&c71_3_memory_region>;
-};
-
 &wkup_gpio_intr {
        status = "okay";
 };
 };
 
 #include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"
+#include "k3-j784s4-ti-ipc-firmware.dtsi"
index 2ed1ec6d53c880b66780034a1706a825efacfd4d..6c7458c76f535da4e368e1b0367fa4c2d023d7a4 100644 (file)
        reserved_memory: reserved-memory {
                #address-cells = <2>;
                #size-cells = <2>;
-
-               c71_3_dma_memory_region: memory@ab000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xab000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_3_memory_region: memory@ab100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xab100000 0x00 0xf00000>;
-                       no-map;
-               };
-       };
-};
-
-&mailbox0_cluster5 {
-       mbox_c71_3: mbox-c71-3 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
        };
 };
 
-&c71_3 {
-       mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
-       memory-region = <&c71_3_dma_memory_region>,
-                       <&c71_3_memory_region>;
-       status = "okay";
-};
+#include "k3-j784s4-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
new file mode 100644 (file)
index 0000000..81b508b
--- /dev/null
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J784S4 SoCs
+ *
+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+       c71_3_dma_memory_region: memory@ab000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xab000000 0x00 0x100000>;
+               no-map;
+       };
+
+       c71_3_memory_region: memory@ab100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xab100000 0x00 0xf00000>;
+               no-map;
+       };
+};
+
+&mailbox0_cluster5 {
+
+       mbox_c71_3: mbox-c71-3 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&c71_3 {
+       mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
+       memory-region = <&c71_3_dma_memory_region>,
+                       <&c71_3_memory_region>;
+       status = "okay";
+};