drm/tilcdc: Fix type mismatch

cpu_to_be32() returns a __be32 big-endian value, but the compound literals
passed to tilcdc_panel_update_prop() were typed as u32. This causes a
sparse type mismatch warning. Fix it by using __be32 as the compound
literal type to match the return type of cpu_to_be32().

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202602200130.LjofC7YE-lkp@intel.com/
Fixes: 0ff223d991477 ("drm/tilcdc: Convert legacy panel binding via DT overlay at boot time")
Signed-off-by: Kory Maincent (TI) <kory.maincent@bootlin.com>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://patch.msgid.link/20260305163907.717719-1-kory.maincent@bootlin.com
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c b/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c
index 37a69b3cf04b25e2ea6aee7f61d6c5cce5318e24..2e7b3e87fea18839c9fd898fcbbd3da89e52a196 100644 (file)
--- a/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c
@@ -105,14 +105,14 @@ static int __init tilcdc_panel_copy_props(struct device_node *old_panel,
 
        if (!invert_pxl_clk) {
                ret = tilcdc_panel_update_prop(&ocs, new_timing, "pixelclk-active",
-                                              &(u32){cpu_to_be32(1)}, sizeof(u32));
+                                              &(__be32){cpu_to_be32(1)}, sizeof(__be32));
                if (ret)
                        goto destroy_ocs;
        }
 
        if (!sync_edge) {
                ret = tilcdc_panel_update_prop(&ocs, new_timing, "syncclk-active",
-                                              &(u32){cpu_to_be32(1)}, sizeof(u32));
+                                              &(__be32){cpu_to_be32(1)}, sizeof(__be32));
                if (ret)
                        goto destroy_ocs;
        }