drm/xe/xe2: Apply Wa_14024997852

Applied Wa_14024997852 to Graphics version 20.01 to 20.04
Whitelist registers needed for userspace to control autostrip on xe2.

v2:
  - set Bit 31 of FF_MODE, for TE autostrip disable (Nitin)
v3:
  - Need to whitelist these for Xe2 IPs (MATT R)
v4:
  - Combine these into a single range for simplicity:(2001, 3005)
    (MATT R)

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Reviewed-by: Nitin Gote <nitin.r.gote@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
Link: https://patch.msgid.link/20260212065920.1815979-1-arvind.yadav@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 9c513778d370f88e96aab6dd942d8249542d6656..728aba8dbd958740b1711db9a1aa78fe2efc8d43 100644 (file)
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -75,7 +75,7 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
          XE_RTP_ACTIONS(WHITELIST(CSBE_DEBUG_STATUS(RENDER_RING_BASE), 0))
        },
        { XE_RTP_NAME("14024997852"),
-         XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),
+         XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 3005), ENGINE_CLASS(RENDER)),
          XE_RTP_ACTIONS(WHITELIST(FF_MODE,
                                   RING_FORCE_TO_NONPRIV_ACCESS_RW),
                         WHITELIST(VFLSKPD,