drm/amdgpu: get rev_id from strap register or IP-discovery table

Query the sub-revision field in the IP Discovery table for the VFs
to obtain their revision ID.
Meanwhile, read the revision ID from the strap register for the PF.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 0d1dd587db5f4980133d4c9281a70b8a4a679ca3..e716097dfde4811fee88edddbe156ef524f861fa 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1843,6 +1843,10 @@ static void gmc_v9_4_3_init_vram_info(struct amdgpu_device *adev)
        if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 5, 0))
                adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM3E;
 
+       if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4) &&
+               adev->rev_id == 0x3)
+               adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM3E;
+
        if (!(adev->flags & AMD_IS_APU) && !amdgpu_sriov_vf(adev)) {
                vram_info = RREG32(regBIF_BIOS_SCRATCH_4);
                adev->gmc.vram_vendor = vram_info & 0xF;

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
index 1c22bc11c1f85f5d322e971bc4843c216ff58e74..bdfd2917e3cabc9deb6686f3895359fc44feb606 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
@@ -41,19 +41,21 @@ static void nbio_v7_9_remap_hdp_registers(struct amdgpu_device *adev)
 
 static u32 nbio_v7_9_get_rev_id(struct amdgpu_device *adev)
 {
-       u32 tmp;
-
-       tmp = IP_VERSION_SUBREV(amdgpu_ip_version_full(adev, NBIO_HWIP, 0));
-       /* If it is VF or subrevision holds a non-zero value, that should be used */
-       if (tmp || amdgpu_sriov_vf(adev))
-               return tmp;
+       u32 rev_id;
 
-       /* If discovery subrev is not updated, use register version */
-       tmp = RREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_DEV0_EPF0_STRAP0);
-       tmp = REG_GET_FIELD(tmp, RCC_STRAP0_RCC_DEV0_EPF0_STRAP0,
-                           STRAP_ATI_REV_ID_DEV0_F0);
+       /*
+        * fetch the sub-revision field from the IP-discovery table
+        * (returns zero if the table entry is not populated).
+        */
+       if (amdgpu_sriov_vf(adev)) {
+               rev_id = IP_VERSION_SUBREV(amdgpu_ip_version_full(adev, NBIO_HWIP, 0));
+       } else {
+               rev_id = RREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_DEV0_EPF0_STRAP0);
+               rev_id = REG_GET_FIELD(rev_id, RCC_STRAP0_RCC_DEV0_EPF0_STRAP0,
+                               STRAP_ATI_REV_ID_DEV0_F0);
+       }
 
-       return tmp;
+       return rev_id;
 }
 
 static void nbio_v7_9_mc_access_enable(struct amdgpu_device *adev, bool enable)