arm64: dts: allwinner: a100: Add pin definitions for RGMII/RMII

The Allwinner A100/A133 supports both RGMII and RMII for its Ethernet
MAC (EMAC) controller. Add corresponding pin definitions.

Note that the sun50iw10 die actually includes two ethernet controllers,
the second of which is rarely exposed to pins. Call the first controller
"emac0" to distinguish it from the second that may be added later.

Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250707165155.581579-3-paulk@sys-base.io
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
index bd366389b2389d6909db64628cbfd53eaa1c0b6c..7d5be09753715088b2d37cfd5cfc0cb601e94310 100644 (file)
--- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
@@ -236,6 +236,21 @@
                                bias-pull-up;
                        };
 
+                       rgmii0_pins: rgmii0-pins {
+                               pins = "PH0", "PH1", "PH2", "PH3", "PH4",
+                                      "PH5", "PH6", "PH7", "PH9", "PH10",
+                                      "PH14", "PH15", "PH16", "PH17", "PH18";
+                               function = "emac0";
+                               drive-strength = <40>;
+                       };
+
+                       rmii0_pins: rmii0-pins {
+                               pins = "PH0", "PH1", "PH2", "PH3", "PH4",
+                                      "PH5", "PH6", "PH7", "PH9", "PH10";
+                               function = "emac0";
+                               drive-strength = <40>;
+                       };
+
                        uart0_pb_pins: uart0-pb-pins {
                                pins = "PB9", "PB10";
                                function = "uart0";