]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
[AArch64 costs 8/18] Cost memory accesses using address costs
authorJames Greenhalgh <james.greenhalgh@arm.com>
Fri, 16 May 2014 08:56:54 +0000 (08:56 +0000)
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>
Fri, 16 May 2014 08:56:54 +0000 (08:56 +0000)
gcc/

* config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
costs when costing loads and stores to memory.

Co-Authored-By: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
From-SVN: r210500

gcc/ChangeLog
gcc/config/aarch64/aarch64.c

index 908e950295aee0614421b7003871e463414fce62..a084ca98aecbbc3e4777c745a089c87bf846ec5a 100644 (file)
@@ -1,3 +1,9 @@
+2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
+           Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
+
+       * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
+       costs when costing loads and stores to memory.
+
 2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
            Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
 
index 92fbd4d0f1c89293deb2ee8cb31c9481e41467f0..d0a5e49eb9010671ccb225f04836805f13133718 100644 (file)
@@ -142,6 +142,7 @@ static bool aarch64_const_vec_all_same_int_p (rtx,
 
 static bool aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
                                                 const unsigned char *sel);
+static int aarch64_address_cost (rtx, enum machine_mode, addr_space_t, bool);
 
 /* The processor for which instructions should be scheduled.  */
 enum aarch64_processor aarch64_tune = cortexa53;
@@ -4870,7 +4871,19 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
        {
        case MEM:
          if (speed)
-           *cost += extra_cost->ldst.store;
+           {
+             rtx address = XEXP (op0, 0);
+             if (GET_MODE_CLASS (mode) == MODE_INT)
+               *cost += extra_cost->ldst.store;
+             else if (mode == SFmode)
+               *cost += extra_cost->ldst.storef;
+             else if (mode == DFmode)
+               *cost += extra_cost->ldst.stored;
+
+             *cost +=
+               COSTS_N_INSNS (aarch64_address_cost (address, mode,
+                                                    0, speed));
+           }
 
          *cost += rtx_cost (op1, SET, 1, speed);
          return true;
@@ -4983,7 +4996,22 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
 
     case MEM:
       if (speed)
-       *cost += extra_cost->ldst.load;
+       {
+         /* For loads we want the base cost of a load, plus an
+            approximation for the additional cost of the addressing
+            mode.  */
+         rtx address = XEXP (x, 0);
+         if (GET_MODE_CLASS (mode) == MODE_INT)
+           *cost += extra_cost->ldst.load;
+         else if (mode == SFmode)
+           *cost += extra_cost->ldst.loadf;
+         else if (mode == DFmode)
+           *cost += extra_cost->ldst.loadd;
+
+         *cost +=
+               COSTS_N_INSNS (aarch64_address_cost (address, mode,
+                                                    0, speed));
+       }
 
       return true;