]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Add lock to serialize sriov command execution
authorYiPeng Chai <YiPeng.Chai@amd.com>
Mon, 21 Jul 2025 07:22:27 +0000 (15:22 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Nov 2025 16:28:07 +0000 (11:28 -0500)
Add lock to serialize sriov command execution.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c

index f2ce8f506aa8acfa558c0c895a7e440e1e194ed6..47a6ce4fdc7444cddc52948d256ca55169d017ec 100644 (file)
@@ -917,6 +917,7 @@ static void amdgpu_virt_init_ras(struct amdgpu_device *adev)
                            RATELIMIT_MSG_ON_RELEASE);
 
        mutex_init(&adev->virt.ras.ras_telemetry_mutex);
+       mutex_init(&adev->virt.access_req_mutex);
 
        adev->virt.ras.cper_rptr = 0;
 }
index 4fd194a9a972eba55bbaaee0c9aea7f858c3c731..01d5bca2dee1655c8576593292888d3e89fc4063 100644 (file)
@@ -325,6 +325,8 @@ struct amdgpu_virt {
        /* Spinlock to protect access to the RLCG register interface */
        spinlock_t rlcg_reg_lock;
 
+       struct mutex access_req_mutex;
+
        union amd_sriov_ras_caps ras_en_caps;
        union amd_sriov_ras_caps ras_telemetry_en_caps;
        struct amdgpu_virt_ras ras;
index cd5b2f07edb89d20bc2add475b776110c4a86d71..e7cd07383d56e9b362e7166c08ea3d1a4958b899 100644 (file)
@@ -173,13 +173,17 @@ static void xgpu_nv_mailbox_trans_msg (struct amdgpu_device *adev,
 static int xgpu_nv_send_access_requests_with_param(struct amdgpu_device *adev,
                        enum idh_request req, u32 data1, u32 data2, u32 data3)
 {
-       int r, retry = 1;
+       struct amdgpu_virt *virt = &adev->virt;
+       int r = 0, retry = 1;
        enum idh_event event = -1;
 
+       mutex_lock(&virt->access_req_mutex);
 send_request:
 
-       if (amdgpu_ras_is_rma(adev))
-               return -ENODEV;
+       if (amdgpu_ras_is_rma(adev)) {
+               r = -ENODEV;
+               goto out;
+       }
 
        xgpu_nv_mailbox_trans_msg(adev, req, data1, data2, data3);
 
@@ -217,7 +221,7 @@ send_request:
 
                        if (req != IDH_REQ_GPU_INIT_DATA) {
                                dev_err(adev->dev, "Doesn't get msg:%d from pf, error=%d\n", event, r);
-                               return r;
+                               goto out;
                        } else /* host doesn't support REQ_GPU_INIT_DATA handshake */
                                adev->virt.req_init_data_ver = 0;
                } else {
@@ -246,7 +250,10 @@ send_request:
                }
        }
 
-       return 0;
+out:
+       mutex_unlock(&virt->access_req_mutex);
+
+       return r;
 }
 
 static int xgpu_nv_send_access_requests(struct amdgpu_device *adev,