wifi: ath11k: fix dest ring-buffer corruption when ring is full

[ Upstream commit aa6956150f820e6a6deba44be325ddfcb5b10f88 ]

Add the missing memory barriers to make sure that destination ring
descriptors are read before updating the tail pointer (and passing
ownership to the device) to avoid memory corruption on weakly ordered
architectures like aarch64 when the ring is full.

Tested-on: WCN6855 hw2.1 WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.41

Fixes: d5c65159f289 ("ath11k: driver for Qualcomm IEEE 802.11ax devices")
Cc: stable@vger.kernel.org      # 5.6
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Baochen Qiang <quic_bqiang@quicinc.com>
Link: https://patch.msgid.link/20250604143457.26032-6-johan+linaro@kernel.org
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c
index 75e83548466930c56a4411a092f52e707fa3c306..d5921805af636c301d6f44b3b21ccb7e7978254a 100644 (file)
--- a/drivers/net/wireless/ath/ath11k/hal.c
+++ b/drivers/net/wireless/ath/ath11k/hal.c
@@ -833,7 +833,6 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
 {
        lockdep_assert_held(&srng->lock);
 
-       /* TODO: See if we need a write memory barrier here */
        if (srng->flags & HAL_SRNG_FLAGS_LMAC_RING) {
                /* For LMAC rings, ring pointer updates are done through FW and
                 * hence written to a shared memory location that is read by FW
@@ -848,7 +847,11 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
                        WRITE_ONCE(*srng->u.src_ring.hp_addr, srng->u.src_ring.hp);
                } else {
                        srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
-                       *srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp;
+                       /* Make sure descriptor is read before updating the
+                        * tail pointer.
+                        */
+                       dma_mb();
+                       WRITE_ONCE(*srng->u.dst_ring.tp_addr, srng->u.dst_ring.tp);
                }
        } else {
                if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
@@ -864,6 +867,10 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
                                           srng->u.src_ring.hp);
                } else {
                        srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
+                       /* Make sure descriptor is read before updating the
+                        * tail pointer.
+                        */
+                       mb();
                        ath11k_hif_write32(ab,
                                           (unsigned long)srng->u.dst_ring.tp_addr -
                                           (unsigned long)ab->mem,