]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
ARM64: zynqmp: Fix psu_init_gpl* violations
authorMichal Simek <michal.simek@xilinx.com>
Mon, 8 Aug 2016 11:17:07 +0000 (13:17 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 18 Aug 2016 06:14:21 +0000 (08:14 +0200)
psu_init_gpl.c/h have pretty bad quality which requires additional fixes
to remove all reported warnings. Also coding style is bad.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
board/xilinx/zynqmp/xilinx_zynqmp_zcu102/psu_init_gpl.c

index f9b562d8800e91822192582328d9ad644beb3da0..1385db3b2bbb0063d0dfe365565aac366c8c8057 100644 (file)
@@ -19,7 +19,7 @@
 ******************************************************************************/
 
 #include <xil_io.h>
-#include <sleep.h>
+/* #include <sleep.h> */
 #include "psu_init_gpl.h"
 
 int mask_pollOnValue(u32 add , u32 mask, u32 value );
@@ -38,7 +38,7 @@ static void PSU_Mask_Write (unsigned long offset, unsigned long mask, unsigned l
        RegVal |= (val & mask);
        Xil_Out32 (offset, RegVal);
 }
-
+/*
        void prog_reg (unsigned long addr, unsigned long mask, unsigned long shift, unsigned long value) {
            int rdata =0;
            rdata  = Xil_In32(addr);
@@ -46,7 +46,7 @@ static void PSU_Mask_Write (unsigned long offset, unsigned long mask, unsigned l
            rdata  = rdata | (value << shift);
            Xil_Out32(addr,rdata);
            }
-
+*/
 unsigned long psu_pll_init_data() {
                // : RPLL INIT
                /*Register : RPLL_CFG @ 0XFF5E0034</p>
@@ -31227,6 +31227,8 @@ unsigned long psu_ddr_phybringup_data() {
        ////////////////////////////////////////////////////////////////////////////////
        int dpll_divisor;
        dpll_divisor = (Xil_In32(0xFD1A0080U) & 0x00003F00U) >> 0x00000008U;
+       if (dpll_divisor != 0 &&  !dpll_divisor)
+               dpll_divisor++;
        prog_reg (0xFD1A0080U, 0x00003F00U, 0x00000008U, 0x00000005U);
        prog_reg (0xFD080028U, 0x00000001U, 0x00000000U, 0x00000001U);
        Xil_Out32(0xFD080004U, 0x00040003U);
@@ -31430,7 +31432,7 @@ unsigned long psu_ddr_phybringup_data() {
 
 // ** declare variables used for calculation **
 
-       int cal_byte0,cal_byte1,cal_byte2,cal_byte3,cal_byte4,cal_byte5,cal_byte6,cal_byte7,cal_byte8;
+       int cal_byte0,cal_byte1,cal_byte2,cal_byte3,cal_byte4,cal_byte5,cal_byte6,cal_byte7; //,cal_byte8;
 
        cal_byte0 = ((DQ0RBD_0 + DQ0RBD_1 + DQ0RBD_2 + DQ0RBD_3 + DQ0RBD_4 + DQ0RBD_5 + DQ0RBD_6 + DQ0RBD_7)/8);
        cal_byte1 = ((DQ1RBD_0 + DQ1RBD_1 + DQ1RBD_2 + DQ1RBD_3 + DQ1RBD_4 + DQ1RBD_5 + DQ1RBD_6 + DQ1RBD_7)/8);