drm/amd/display: Add DCE BIOS_SCRATCH_0 register

The BIOS uses this register to write the results of the
DAC_LoadDetection command, so we'll need to read this
in order to make DAC load detection work.

As a reference, I used the mmBIOS_SCRATCH_0 definition from
the amdgpu legacy display code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
index 545ce1e15eaeb0ffcef3e7fa23be5c37d71fbebe..50c8906b74c59a6c36f956169b88966230bbe42b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
@@ -168,6 +168,7 @@ struct dc_vbios_funcs {
 };
 
 struct bios_registers {
+       uint32_t BIOS_SCRATCH_0;
        uint32_t BIOS_SCRATCH_3;
        uint32_t BIOS_SCRATCH_6;
 };

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
index 85ea219e4fd4fd323b640ddd6c1a5ca226c9e960..d40d91ec2035ffc47363691b7076a3d269594482 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
@@ -78,6 +78,7 @@
 #endif
 
 #ifndef mmBIOS_SCRATCH_2
+       #define mmBIOS_SCRATCH_0 0x05C9
        #define mmBIOS_SCRATCH_2 0x05CB
        #define mmBIOS_SCRATCH_3 0x05CC
        #define mmBIOS_SCRATCH_6 0x05CF
@@ -369,6 +370,7 @@ static const struct dce_abm_mask abm_mask = {
 #define DCFE_MEM_PWR_CTRL_REG_BASE 0x1b03
 
 static const struct bios_registers bios_regs = {
+       .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
        .BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
        .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
index 9e14ffb3c9428599bef19588fddf5978f10ef91a..cd54382c0af3ee19e7ce4bb25dde56daff538611 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
@@ -82,6 +82,7 @@
 #endif
 
 #ifndef mmBIOS_SCRATCH_2
+       #define mmBIOS_SCRATCH_0 0x05C9
        #define mmBIOS_SCRATCH_2 0x05CB
        #define mmBIOS_SCRATCH_3 0x05CC
        #define mmBIOS_SCRATCH_6 0x05CF
@@ -377,6 +378,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+       .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
        .BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
        .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
index 62977bcdeaa09007cf0d4656e3f50302441f0401..3f0a6bc4dcc233dda3596382f2f182b9c547385c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
@@ -76,6 +76,7 @@
 #endif
 
 #ifndef mmBIOS_SCRATCH_2
+       #define mmBIOS_SCRATCH_0 0x05C9
        #define mmBIOS_SCRATCH_2 0x05CB
        #define mmBIOS_SCRATCH_3 0x05CC
        #define mmBIOS_SCRATCH_6 0x05CF
@@ -385,6 +386,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+       .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
        .BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
        .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
index 0770ea37183f91f94c270586493d39dd02755aa6..b1570b6b1af306175837c280cff061888d828fb7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
@@ -491,6 +491,7 @@ static struct dce_i2c_hw *dce120_i2c_hw_create(
        return dce_i2c_hw;
 }
 static const struct bios_registers bios_regs = {
+       .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0 + NBIO_BASE(mmBIOS_SCRATCH_0_BASE_IDX),
        .BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3 + NBIO_BASE(mmBIOS_SCRATCH_3_BASE_IDX),
        .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6 + NBIO_BASE(mmBIOS_SCRATCH_6_BASE_IDX)
 };

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
index 6e89b7020b61293357c3d1703a8fae31e7c5a629..f0152933bee2c09859b45ba4b15ebd9d0e8d78d0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
@@ -80,6 +80,7 @@
 
 
 #ifndef mmBIOS_SCRATCH_2
+       #define mmBIOS_SCRATCH_0 0x05C9
        #define mmBIOS_SCRATCH_2 0x05CB
        #define mmBIOS_SCRATCH_3 0x05CC
        #define mmBIOS_SCRATCH_6 0x05CF
@@ -368,6 +369,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+       .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
        .BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
        .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
index a1ad7398e39f7331f70da6aeaed463dabf427ad7..8687104cabb723b88eec6fe363be25c16f37682c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
@@ -78,6 +78,7 @@
 
 
 #ifndef mmBIOS_SCRATCH_2
+       #define mmBIOS_SCRATCH_0 0x05C9
        #define mmBIOS_SCRATCH_2 0x05CB
        #define mmBIOS_SCRATCH_3 0x05CC
        #define mmBIOS_SCRATCH_6 0x05CF
@@ -369,6 +370,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+       .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
        .BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
        .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };