+++ /dev/null
-From a5a8ef937cfa79167f4b2a5602092b8d14fd6b9a Mon Sep 17 00:00:00 2001
-From: Colin Xu <colin.xu@intel.com>
-Date: Mon, 9 Nov 2020 15:39:22 +0800
-Subject: drm/i915/gvt: Fix virtual display setup for BXT/APL
-
-From: Colin Xu <colin.xu@intel.com>
-
-commit a5a8ef937cfa79167f4b2a5602092b8d14fd6b9a upstream.
-
-Program display related vregs to proper value at initialization, setup
-virtual monitor and hotplug.
-
-vGPU virtual display vregs inherit the value from pregs. The virtual DP
-monitor is always setup on PORT_B for BXT/APL. However the host may
-connect monitor on other PORT or without any monitor connected. Without
-properly setup PIPE/DDI/PLL related vregs, guest driver may not setup
-the virutal display as expected, and the guest desktop may not be
-created.
-Since only one virtual display is supported, enable PIPE_A only. And
-enable transcoder/DDI/PLL based on which port is setup for BXT/APL.
-
-V2:
-Revise commit message.
-
-V3:
-set_edid should on PORT_B for BXT.
-Inject hpd event for BXT.
-
-V4:
-Temporarily disable vfio edid on BXT/APL until issue fixed.
-
-V5:
-Rebase to use new HPD define GEN8_DE_PORT_HOTPLUG for BXT.
-Put vfio edid disabling on BXT/APL to a separate patch.
-
-Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-Signed-off-by: Colin Xu <colin.xu@intel.com>
-Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/20201109073922.757759-1-colin.xu@intel.com
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/gpu/drm/i915/gvt/display.c | 173 +++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/gvt/mmio.c | 5 +
- 2 files changed, 178 insertions(+)
-
---- a/drivers/gpu/drm/i915/gvt/display.c
-+++ b/drivers/gpu/drm/i915/gvt/display.c
-@@ -173,21 +173,161 @@ static void emulate_monitor_status_chang
- int pipe;
-
- if (IS_BROXTON(dev_priv)) {
-+ enum transcoder trans;
-+ enum port port;
-+
-+ /* Clear PIPE, DDI, PHY, HPD before setting new */
- vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~(BXT_DE_PORT_HP_DDIA |
- BXT_DE_PORT_HP_DDIB |
- BXT_DE_PORT_HP_DDIC);
-
-+ for_each_pipe(dev_priv, pipe) {
-+ vgpu_vreg_t(vgpu, PIPECONF(pipe)) &=
-+ ~(PIPECONF_ENABLE | I965_PIPECONF_ACTIVE);
-+ vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE;
-+ vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
-+ vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE;
-+ vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;
-+ }
-+
-+ for (trans = TRANSCODER_A; trans <= TRANSCODER_EDP; trans++) {
-+ vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(trans)) &=
-+ ~(TRANS_DDI_BPC_MASK | TRANS_DDI_MODE_SELECT_MASK |
-+ TRANS_DDI_PORT_MASK | TRANS_DDI_FUNC_ENABLE);
-+ }
-+ vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
-+ ~(TRANS_DDI_BPC_MASK | TRANS_DDI_MODE_SELECT_MASK |
-+ TRANS_DDI_PORT_MASK);
-+
-+ for (port = PORT_A; port <= PORT_C; port++) {
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(port)) &=
-+ ~BXT_PHY_LANE_ENABLED;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(port)) |=
-+ (BXT_PHY_CMNLANE_POWERDOWN_ACK |
-+ BXT_PHY_LANE_POWERDOWN_ACK);
-+
-+ vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(port)) &=
-+ ~(PORT_PLL_POWER_STATE | PORT_PLL_POWER_ENABLE |
-+ PORT_PLL_REF_SEL | PORT_PLL_LOCK |
-+ PORT_PLL_ENABLE);
-+
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) &=
-+ ~(DDI_INIT_DISPLAY_DETECTED |
-+ DDI_BUF_CTL_ENABLE);
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) |= DDI_BUF_IS_IDLE;
-+ }
-+
-+ vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &= ~(BIT(0) | BIT(1));
-+ vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &=
-+ ~PHY_POWER_GOOD;
-+ vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &=
-+ ~PHY_POWER_GOOD;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &= ~BIT(30);
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) &= ~BIT(30);
-+
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) &= ~SFUSE_STRAP_DDIB_DETECTED;
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) &= ~SFUSE_STRAP_DDIC_DETECTED;
-+
-+ /*
-+ * Only 1 PIPE enabled in current vGPU display and PIPE_A is
-+ * tied to TRANSCODER_A in HW, so it's safe to assume PIPE_A,
-+ * TRANSCODER_A can be enabled. PORT_x depends on the input of
-+ * setup_virtual_dp_monitor.
-+ */
-+ vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE;
-+ vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= I965_PIPECONF_ACTIVE;
-+
-+ /*
-+ * Golden M/N are calculated based on:
-+ * 24 bpp, 4 lanes, 154000 pixel clk (from virtual EDID),
-+ * DP link clk 1620 MHz and non-constant_n.
-+ * TODO: calculate DP link symbol clk and stream clk m/n.
-+ */
-+ vgpu_vreg_t(vgpu, PIPE_DATA_M1(TRANSCODER_A)) = 63 << TU_SIZE_SHIFT;
-+ vgpu_vreg_t(vgpu, PIPE_DATA_M1(TRANSCODER_A)) |= 0x5b425e;
-+ vgpu_vreg_t(vgpu, PIPE_DATA_N1(TRANSCODER_A)) = 0x800000;
-+ vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)) = 0x3cd6e;
-+ vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)) = 0x80000;
-+
-+ /* Enable per-DDI/PORT vreg */
- if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
-+ vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(1);
-+ vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) |=
-+ PHY_POWER_GOOD;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) |=
-+ BIT(30);
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) |=
-+ BXT_PHY_LANE_ENABLED;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &=
-+ ~(BXT_PHY_CMNLANE_POWERDOWN_ACK |
-+ BXT_PHY_LANE_POWERDOWN_ACK);
-+ vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_A)) |=
-+ (PORT_PLL_POWER_STATE | PORT_PLL_POWER_ENABLE |
-+ PORT_PLL_REF_SEL | PORT_PLL_LOCK |
-+ PORT_PLL_ENABLE);
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |=
-+ (DDI_BUF_CTL_ENABLE | DDI_INIT_DISPLAY_DETECTED);
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &=
-+ ~DDI_BUF_IS_IDLE;
-+ vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_EDP)) |=
-+ (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
-+ TRANS_DDI_FUNC_ENABLE);
- vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
- BXT_DE_PORT_HP_DDIA;
- }
-
- if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIB_DETECTED;
-+ vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(0);
-+ vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |=
-+ PHY_POWER_GOOD;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |=
-+ BIT(30);
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) |=
-+ BXT_PHY_LANE_ENABLED;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) &=
-+ ~(BXT_PHY_CMNLANE_POWERDOWN_ACK |
-+ BXT_PHY_LANE_POWERDOWN_ACK);
-+ vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_B)) |=
-+ (PORT_PLL_POWER_STATE | PORT_PLL_POWER_ENABLE |
-+ PORT_PLL_REF_SEL | PORT_PLL_LOCK |
-+ PORT_PLL_ENABLE);
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |=
-+ DDI_BUF_CTL_ENABLE;
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &=
-+ ~DDI_BUF_IS_IDLE;
-+ vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
-+ (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
-+ (PORT_B << TRANS_DDI_PORT_SHIFT) |
-+ TRANS_DDI_FUNC_ENABLE);
- vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
- BXT_DE_PORT_HP_DDIB;
- }
-
- if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIC_DETECTED;
-+ vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(0);
-+ vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |=
-+ PHY_POWER_GOOD;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |=
-+ BIT(30);
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) |=
-+ BXT_PHY_LANE_ENABLED;
-+ vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) &=
-+ ~(BXT_PHY_CMNLANE_POWERDOWN_ACK |
-+ BXT_PHY_LANE_POWERDOWN_ACK);
-+ vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_C)) |=
-+ (PORT_PLL_POWER_STATE | PORT_PLL_POWER_ENABLE |
-+ PORT_PLL_REF_SEL | PORT_PLL_LOCK |
-+ PORT_PLL_ENABLE);
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |=
-+ DDI_BUF_CTL_ENABLE;
-+ vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &=
-+ ~DDI_BUF_IS_IDLE;
-+ vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
-+ (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
-+ (PORT_B << TRANS_DDI_PORT_SHIFT) |
-+ TRANS_DDI_FUNC_ENABLE);
- vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
- BXT_DE_PORT_HP_DDIC;
- }
-@@ -519,6 +659,39 @@ void intel_vgpu_emulate_hotplug(struct i
- vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |=
- PORTD_HOTPLUG_STATUS_MASK;
- intel_vgpu_trigger_virtual_event(vgpu, DP_D_HOTPLUG);
-+ } else if (IS_BROXTON(dev_priv)) {
-+ if (connected) {
-+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
-+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= BXT_DE_PORT_HP_DDIA;
-+ }
-+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) |=
-+ SFUSE_STRAP_DDIB_DETECTED;
-+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= BXT_DE_PORT_HP_DDIB;
-+ }
-+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) |=
-+ SFUSE_STRAP_DDIC_DETECTED;
-+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= BXT_DE_PORT_HP_DDIC;
-+ }
-+ } else {
-+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
-+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~BXT_DE_PORT_HP_DDIA;
-+ }
-+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) &=
-+ ~SFUSE_STRAP_DDIB_DETECTED;
-+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~BXT_DE_PORT_HP_DDIB;
-+ }
-+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
-+ vgpu_vreg_t(vgpu, SFUSE_STRAP) &=
-+ ~SFUSE_STRAP_DDIC_DETECTED;
-+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~BXT_DE_PORT_HP_DDIC;
-+ }
-+ }
-+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |=
-+ PORTB_HOTPLUG_STATUS_MASK;
-+ intel_vgpu_trigger_virtual_event(vgpu, DP_B_HOTPLUG);
- }
- }
-
---- a/drivers/gpu/drm/i915/gvt/mmio.c
-+++ b/drivers/gpu/drm/i915/gvt/mmio.c
-@@ -280,6 +280,11 @@ void intel_vgpu_reset_mmio(struct intel_
- vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) |=
- BXT_PHY_CMNLANE_POWERDOWN_ACK |
- BXT_PHY_LANE_POWERDOWN_ACK;
-+ vgpu_vreg_t(vgpu, SKL_FUSE_STATUS) |=
-+ SKL_FUSE_DOWNLOAD_STATUS |
-+ SKL_FUSE_PG_DIST_STATUS(SKL_PG0) |
-+ SKL_FUSE_PG_DIST_STATUS(SKL_PG1) |
-+ SKL_FUSE_PG_DIST_STATUS(SKL_PG2);
- }
- } else {
- #define GVT_GEN8_MMIO_RESET_OFFSET (0x44200)
--- /dev/null
+From 6ee65a773096ab3f39d9b00311ac983be5bdeb7c Mon Sep 17 00:00:00 2001
+From: "J. Bruce Fields" <bfields@redhat.com>
+Date: Mon, 8 Mar 2021 10:52:29 -0500
+Subject: Revert "nfsd4: a client's own opens needn't prevent delegations"
+
+From: J. Bruce Fields <bfields@redhat.com>
+
+commit 6ee65a773096ab3f39d9b00311ac983be5bdeb7c upstream.
+
+This reverts commit 94415b06eb8aed13481646026dc995f04a3a534a.
+
+That commit claimed to allow a client to get a read delegation when it
+was the only writer. Actually it allowed a client to get a read
+delegation when *any* client has a write open!
+
+The main problem is that it's depending on nfs4_clnt_odstate structures
+that are actually only maintained for pnfs exports.
+
+This causes clients to miss writes performed by other clients, even when
+there have been intervening closes and opens, violating close-to-open
+cache consistency.
+
+We can do this a different way, but first we should just revert this.
+
+I've added pynfs 4.1 test DELEG19 to test for this, as I should have
+done originally!
+
+Cc: stable@vger.kernel.org
+Reported-by: Timo Rothenpieler <timo@rothenpieler.org>
+Signed-off-by: J. Bruce Fields <bfields@redhat.com>
+Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ fs/locks.c | 3 --
+ fs/nfsd/nfs4state.c | 54 +++++++++++++---------------------------------------
+ 2 files changed, 14 insertions(+), 43 deletions(-)
+
+--- a/fs/locks.c
++++ b/fs/locks.c
+@@ -1808,9 +1808,6 @@ check_conflicting_open(struct file *filp
+
+ if (flags & FL_LAYOUT)
+ return 0;
+- if (flags & FL_DELEG)
+- /* We leave these checks to the caller. */
+- return 0;
+
+ if (arg == F_RDLCK)
+ return inode_is_open_for_write(inode) ? -EAGAIN : 0;
+--- a/fs/nfsd/nfs4state.c
++++ b/fs/nfsd/nfs4state.c
+@@ -4945,32 +4945,6 @@ static struct file_lock *nfs4_alloc_init
+ return fl;
+ }
+
+-static int nfsd4_check_conflicting_opens(struct nfs4_client *clp,
+- struct nfs4_file *fp)
+-{
+- struct nfs4_clnt_odstate *co;
+- struct file *f = fp->fi_deleg_file->nf_file;
+- struct inode *ino = locks_inode(f);
+- int writes = atomic_read(&ino->i_writecount);
+-
+- if (fp->fi_fds[O_WRONLY])
+- writes--;
+- if (fp->fi_fds[O_RDWR])
+- writes--;
+- WARN_ON_ONCE(writes < 0);
+- if (writes > 0)
+- return -EAGAIN;
+- spin_lock(&fp->fi_lock);
+- list_for_each_entry(co, &fp->fi_clnt_odstate, co_perfile) {
+- if (co->co_client != clp) {
+- spin_unlock(&fp->fi_lock);
+- return -EAGAIN;
+- }
+- }
+- spin_unlock(&fp->fi_lock);
+- return 0;
+-}
+-
+ static struct nfs4_delegation *
+ nfs4_set_delegation(struct nfs4_client *clp, struct svc_fh *fh,
+ struct nfs4_file *fp, struct nfs4_clnt_odstate *odstate)
+@@ -4990,12 +4964,9 @@ nfs4_set_delegation(struct nfs4_client *
+
+ nf = find_readable_file(fp);
+ if (!nf) {
+- /*
+- * We probably could attempt another open and get a read
+- * delegation, but for now, don't bother until the
+- * client actually sends us one.
+- */
+- return ERR_PTR(-EAGAIN);
++ /* We should always have a readable file here */
++ WARN_ON_ONCE(1);
++ return ERR_PTR(-EBADF);
+ }
+ spin_lock(&state_lock);
+ spin_lock(&fp->fi_lock);
+@@ -5025,19 +4996,11 @@ nfs4_set_delegation(struct nfs4_client *
+ if (!fl)
+ goto out_clnt_odstate;
+
+- status = nfsd4_check_conflicting_opens(clp, fp);
+- if (status) {
+- locks_free_lock(fl);
+- goto out_clnt_odstate;
+- }
+ status = vfs_setlease(fp->fi_deleg_file->nf_file, fl->fl_type, &fl, NULL);
+ if (fl)
+ locks_free_lock(fl);
+ if (status)
+ goto out_clnt_odstate;
+- status = nfsd4_check_conflicting_opens(clp, fp);
+- if (status)
+- goto out_clnt_odstate;
+
+ spin_lock(&state_lock);
+ spin_lock(&fp->fi_lock);
+@@ -5119,6 +5082,17 @@ nfs4_open_delegation(struct svc_fh *fh,
+ goto out_no_deleg;
+ if (!cb_up || !(oo->oo_flags & NFS4_OO_CONFIRMED))
+ goto out_no_deleg;
++ /*
++ * Also, if the file was opened for write or
++ * create, there's a good chance the client's
++ * about to write to it, resulting in an
++ * immediate recall (since we don't support
++ * write delegations):
++ */
++ if (open->op_share_access & NFS4_SHARE_ACCESS_WRITE)
++ goto out_no_deleg;
++ if (open->op_create == NFS4_OPEN_CREATE)
++ goto out_no_deleg;
+ break;
+ default:
+ goto out_no_deleg;
projects / thirdparty / kernel / stable-queue.git / commitdiff
