drm/msm/a6xx: fix gmu start on newer firmware

[ Upstream commit f5749d6181fa7df5ae741788e5d96f593d3a60b6 ]

New Qualcomm firmware has changed a way it reports back the 'started'
event. Support new register values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 1d330204c465c8fe7a1bfbe04d1d495b4b6cb951..2dd1cf1ffbe25636515eca4344fd7c3f87a19c4b 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -207,6 +207,16 @@ static int a6xx_gmu_start(struct a6xx_gmu *gmu)
 {
        int ret;
        u32 val;
+       u32 mask, reset_val;
+
+       val = gmu_read(gmu, REG_A6XX_GMU_CM3_DTCM_START + 0xff8);
+       if (val <= 0x20010004) {
+               mask = 0xffffffff;
+               reset_val = 0xbabeface;
+       } else {
+               mask = 0x1ff;
+               reset_val = 0x100;
+       }
 
        gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);
 
@@ -218,7 +228,7 @@ static int a6xx_gmu_start(struct a6xx_gmu *gmu)
        gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 0);
 
        ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_CM3_FW_INIT_RESULT, val,
-               val == 0xbabeface, 100, 10000);
+               (val & mask) == reset_val, 100, 10000);
 
        if (ret)
                DRM_DEV_ERROR(gmu->dev, "GMU firmware initialization timed out\n");