realtek: mdio-serdes: reorgnaize RTL839x ANA_10G pages

With all the recent development about RTL93xx serdes it has become
clear that the RTL839x ANA_TG page mapping is not perfect. Until
know it is mapped to pages 10/11. As its naming suggests these are
serdes analogous register settings for 10G. Map it to the appropriate
ANA_10G pages to align better with RTL93xx. Adapt all consumers
in the pcs driver accordingly.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

diff --git a/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto-serdes.c b/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto-serdes.c
index 11e2c44b6885d591328cb888fe710ea46aae23f0..828d8b6c4b2a117ed9e24161bf39a43995eff7f4 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto-serdes.c
+++ b/target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto-serdes.c
@@ -23,7 +23,7 @@
 #define RTSDS_838X_BASE                        0xe780
 
 #define RTSDS_839X_SDS_CNT             14
-#define RTSDS_839X_PAGE_CNT            12
+#define RTSDS_839X_PAGE_CNT            64
 #define RTSDS_839X_BASE                        0xa000
 
 #define RTSDS_930X_SDS_CNT             12
@@ -224,34 +224,35 @@ static int rtsds_838x_write(struct rtsds_ctrl *ctrl, int sds, int page, int regn
  *
  * The most consistent mapping that aligns to the RTL93xx devices is:
  *
- *             even 5G SerDes  odd 5G SerDes   even 10G SerDes odd 10G SerDes
- * Page 0:     XSG0/0          XSG1/0          XSG0/0          XSG1/0
- * Page 1:     XSG0/1          XSG1/1          XSG0/1          XSG1/1
- * Page 2:     XSG0/2          XSG1/2          XSG0/2          XSG1/2
- * Page 3:     XSG0/3          XSG1/3          XSG0/3          XSG1/3
- * Page 4:     <zero>          <zero>          TGRX/0          <zero>
- * Page 5:     <zero>          <zero>          TGRX/1          <zero>
- * Page 6:     <zero>          <zero>          TGRX/2          <zero>
- * Page 7:     <zero>          <zero>          TGRX/3          <zero>
- * Page 8:     ANA_RG          ANA_RG          <zero>          <zero>
- * Page 9:     ANA_RG_EXT      ANA_RG_EXT      <zero>          <zero>
- * Page 10:    <zero>          <zero>          ANA_TG          ANA_TG
- * Page 11:    <zero>          <zero>          ANA_TG_EXT      ANA_TG_EXT
+ * RTL93xx page                even 5G SerDes  odd 5G SerDes   even 10G SerDes odd 10G SerDes
+ * 0x00 (SDS)          XSG0/0          XSG1/0          XSG0/0          XSG1/0
+ * 0x01 (SDS_EXT)      XSG0/1          XSG1/1          XSG0/1          XSG1/1
+ * 0x02 (FIB)          XSG0/2          XSG1/2          XSG0/2          XSG1/2
+ * 0x03 (FIB_EXT)      XSG0/3          XSG1/3          XSG0/3          XSG1/3
+ * 0x04 (TGR_STD_0)    <zero>          <zero>          TGRX/0          <zero>
+ * 0x05 (TGR_STD_1)    <zero>          <zero>          TGRX/1          <zero>
+ * 0x06 (TGR_PRO_0)    <zero>          <zero>          TGRX/2          <zero>
+ * 0x07 (TGR_PRO_1)    <zero>          <zero>          TGRX/3          <zero>
+ * 0x08 (TGX_STD_0)    ANA_RG          ANA_RG          <zero>          <zero>
+ * 0x09 (TGX_STD_1)    ANA_RG_EXT      ANA_RG_EXT      <zero>          <zero>
+ * ...                 <zero>          <zero>          <zero>          <zero>
+ * 0x2e (ANA_10G)      <zero>          <zero>          ANA_TG          ANA_TG
+ * 0x2f (ANA_10G_EXT)  <zero>          <zero>          ANA_TG_EXT      ANA_TG_EXT
  */
 
 static int rtsds_839x_reg_offset(int sds, int page, int regnum)
 {
-       int offset = ((sds & 0xfe) << 9) + ((regnum & 0xfe) << 1) + (page << 6);
+       int offset = ((sds & 0xfe) << 9) + ((regnum & 0xfe) << 1);
        int sds5g = (GENMASK(11, 10) | GENMASK(7, 0)) & BIT(sds);
 
        if (page < 4)
-               return offset + ((sds & 1) << 8);
-       else if ((page & 4) && (sds == 8 || sds == 12))
-               return offset + 0x100;
+               return offset + (page << 6) + ((sds & 1) << 8);
+       else if (page >= 4 && page <=7 && (sds == 8 || sds == 12))
+               return offset + (page << 6) + 0x100;
        else if (page >= 8 && page <= 9 && sds5g)
-               return offset + 0x100 + ((sds & 1) << 7);
-       else if (page >= 10 && !sds5g)
-               return offset + 0x80 + ((sds & 1) << 7);
+               return offset + (page << 6) + 0x100 + ((sds & 1) << 7);
+       else if (page >= 0x2e && page <= 0x2f && !sds5g)
+               return offset + ((page - 0x24) << 6) + 0x80 + ((sds & 1) << 7);
 
        return -EINVAL; /* hole */
 }

diff --git a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c
index e2af24b1053d2b7739318c222059570216390586..8896640d23c60fe0799bd8af6b634d6ccd432d3c 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c
+++ b/target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c
@@ -896,15 +896,15 @@ static void rtpcs_839x_sds_reset(struct rtpcs_serdes *sds)
                return;
 
        if (is_10g_sds) {
-               rtpcs_sds_write_bits(odd_sds, 0xb, 0x1d, 3, 0, 0x5);
+               rtpcs_sds_write_bits(odd_sds, 0x2f, 0x1d, 3, 0, 0x5);
                msleep(500);
-               rtpcs_sds_write_bits(odd_sds, 0xb, 0x1d, 3, 0, 0xf);
-               rtpcs_sds_write_bits(odd_sds, 0xb, 0x1d, 3, 0, 0x0);
+               rtpcs_sds_write_bits(odd_sds, 0x2f, 0x1d, 3, 0, 0xf);
+               rtpcs_sds_write_bits(odd_sds, 0x2f, 0x1d, 3, 0, 0x0);
 
-               rtpcs_sds_write_bits(even_sds, 0xa, 0x10, 3, 3, 0x0);
-               rtpcs_sds_write_bits(even_sds, 0xb, 0x0, 15, 15, 0x1);
+               rtpcs_sds_write_bits(even_sds, 0x2e, 0x10, 3, 3, 0x0);
+               rtpcs_sds_write_bits(even_sds, 0x2f, 0x0, 15, 15, 0x1);
                msleep(100);
-               rtpcs_sds_write_bits(even_sds, 0xb, 0x0, 15, 15, 0x0);
+               rtpcs_sds_write_bits(even_sds, 0x2f, 0x0, 15, 15, 0x0);
        } else {
                rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x0050);
                rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x00f0);
@@ -970,105 +970,105 @@ static void rtpcs_839x_sds_init(struct rtpcs_serdes *sds)
                return;
 
        /* Part 1: register setup */
-       rtpcs_sds_write(sds, 0xa, 0x0, 0x5800);
-       rtpcs_sds_write(sds, 0xa, 0x1, 0x4000);
-       rtpcs_sds_write(sds, 0xa, 0x2, is_even ? 0x5400 : 0x5000);
-       rtpcs_sds_write(sds, 0xa, 0x3, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x4, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x5, 0x4000);
-       rtpcs_sds_write(sds, 0xa, 0x6, 0x4000);
-       rtpcs_sds_write(sds, 0xa, 0x7, 0xffff);
-       rtpcs_sds_write(sds, 0xa, 0x8, 0xffff);
-       rtpcs_sds_write(sds, 0xa, 0x9, 0x806f);
-       rtpcs_sds_write(sds, 0xa, 0xa, 0x0004);
-       rtpcs_sds_write(sds, 0xa, 0xb, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0xc, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0xd, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0xe, 0x0a00);
-       rtpcs_sds_write(sds, 0xa, 0xf, 0x2000);
-       rtpcs_sds_write(sds, 0xa, 0x10, 0xf00e);
-       rtpcs_sds_write(sds, 0xa, 0x11, is_even ? 0xf04a : 0xfdab);
-       rtpcs_sds_write(sds, 0xa, 0x12, is_even ? 0x97b3 : 0x96ea);
-       rtpcs_sds_write(sds, 0xa, 0x13, 0x5318);
-       rtpcs_sds_write(sds, 0xa, 0x14, 0x0f03);
-       rtpcs_sds_write(sds, 0xa, 0x15, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x16, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x17, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x18, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x19, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x1a, 0xffff);
-       rtpcs_sds_write(sds, 0xa, 0x1b, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x1c, 0x1203);
-       rtpcs_sds_write(sds, 0xa, 0x1d, 0x0000);
-       rtpcs_sds_write(sds, 0xa, 0x1e, 0xa052);
-       rtpcs_sds_write(sds, 0xa, 0x1f, 0x9a00);
-       rtpcs_sds_write(sds, 0xb, 0x0, 0x00f5);
-       rtpcs_sds_write(sds, 0xb, 0x1, 0xf000);
-       rtpcs_sds_write(sds, 0xb, 0x2, is_even ? 0x41ff : 0x4079);
-       rtpcs_sds_write(sds, 0xb, 0x3, 0x0000);
-       rtpcs_sds_write(sds, 0xb, 0x4, is_even ? 0x39ff : 0x93fa);
-       rtpcs_sds_write(sds, 0xb, 0x5, 0x3340);
-       rtpcs_sds_write(sds, 0xb, 0x6, is_even ? 0x40aa : 0x4280);
-       rtpcs_sds_write(sds, 0xb, 0x7, 0x0000);
-       rtpcs_sds_write(sds, 0xb, 0x8, 0x801f);
-       rtpcs_sds_write(sds, 0xb, 0x9, 0x0000);
-       rtpcs_sds_write(sds, 0xb, 0xa, 0x619c);
-       rtpcs_sds_write(sds, 0xb, 0xb, 0xffed);
-       rtpcs_sds_write(sds, 0xb, 0xc, 0x29ff);
-       rtpcs_sds_write(sds, 0xb, 0xd, 0x29ff);
-       rtpcs_sds_write(sds, 0xb, 0xe, is_even ? 0x4e10 : 0x4c50);
-       rtpcs_sds_write(sds, 0xb, 0xf, is_even ? 0x4e10 : 0x4c50);
-       rtpcs_sds_write(sds, 0xb, 0x10, 0x0000);
-       rtpcs_sds_write(sds, 0xb, 0x11, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x0, 0x5800);
+       rtpcs_sds_write(sds, 0x2e, 0x1, 0x4000);
+       rtpcs_sds_write(sds, 0x2e, 0x2, is_even ? 0x5400 : 0x5000);
+       rtpcs_sds_write(sds, 0x2e, 0x3, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x4, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x5, 0x4000);
+       rtpcs_sds_write(sds, 0x2e, 0x6, 0x4000);
+       rtpcs_sds_write(sds, 0x2e, 0x7, 0xffff);
+       rtpcs_sds_write(sds, 0x2e, 0x8, 0xffff);
+       rtpcs_sds_write(sds, 0x2e, 0x9, 0x806f);
+       rtpcs_sds_write(sds, 0x2e, 0xa, 0x0004);
+       rtpcs_sds_write(sds, 0x2e, 0xb, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0xc, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0xd, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0xe, 0x0a00);
+       rtpcs_sds_write(sds, 0x2e, 0xf, 0x2000);
+       rtpcs_sds_write(sds, 0x2e, 0x10, 0xf00e);
+       rtpcs_sds_write(sds, 0x2e, 0x11, is_even ? 0xf04a : 0xfdab);
+       rtpcs_sds_write(sds, 0x2e, 0x12, is_even ? 0x97b3 : 0x96ea);
+       rtpcs_sds_write(sds, 0x2e, 0x13, 0x5318);
+       rtpcs_sds_write(sds, 0x2e, 0x14, 0x0f03);
+       rtpcs_sds_write(sds, 0x2e, 0x15, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x16, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x17, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x18, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x19, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x1a, 0xffff);
+       rtpcs_sds_write(sds, 0x2e, 0x1b, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x1c, 0x1203);
+       rtpcs_sds_write(sds, 0x2e, 0x1d, 0x0000);
+       rtpcs_sds_write(sds, 0x2e, 0x1e, 0xa052);
+       rtpcs_sds_write(sds, 0x2e, 0x1f, 0x9a00);
+       rtpcs_sds_write(sds, 0x2f, 0x0, 0x00f5);
+       rtpcs_sds_write(sds, 0x2f, 0x1, 0xf000);
+       rtpcs_sds_write(sds, 0x2f, 0x2, is_even ? 0x41ff : 0x4079);
+       rtpcs_sds_write(sds, 0x2f, 0x3, 0x0000);
+       rtpcs_sds_write(sds, 0x2f, 0x4, is_even ? 0x39ff : 0x93fa);
+       rtpcs_sds_write(sds, 0x2f, 0x5, 0x3340);
+       rtpcs_sds_write(sds, 0x2f, 0x6, is_even ? 0x40aa : 0x4280);
+       rtpcs_sds_write(sds, 0x2f, 0x7, 0x0000);
+       rtpcs_sds_write(sds, 0x2f, 0x8, 0x801f);
+       rtpcs_sds_write(sds, 0x2f, 0x9, 0x0000);
+       rtpcs_sds_write(sds, 0x2f, 0xa, 0x619c);
+       rtpcs_sds_write(sds, 0x2f, 0xb, 0xffed);
+       rtpcs_sds_write(sds, 0x2f, 0xc, 0x29ff);
+       rtpcs_sds_write(sds, 0x2f, 0xd, 0x29ff);
+       rtpcs_sds_write(sds, 0x2f, 0xe, is_even ? 0x4e10 : 0x4c50);
+       rtpcs_sds_write(sds, 0x2f, 0xf, is_even ? 0x4e10 : 0x4c50);
+       rtpcs_sds_write(sds, 0x2f, 0x10, 0x0000);
+       rtpcs_sds_write(sds, 0x2f, 0x11, 0x0000);
        rtpcs_sds_write(sds, 0x0, 0xc, 0x08ec);
        if (!is_even)
-               rtpcs_sds_write(sds, 0xb, 0x1f, 0x003f);
+               rtpcs_sds_write(sds, 0x2f, 0x1f, 0x003f);
 
        /* Part 2: register bit patching (contains some "reset flips") */
        rtpcs_sds_write_bits(sds, 0x0, 0x7, 14, 14, 0x0001);
-       rtpcs_sds_write_bits(sds, 0xb, 0x9, 15, 0, 0x417f);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1c, 9, 9, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1c, 12, 10, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1c, 5, 3, 0x0005);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1c, 8, 6, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1c, 2, 0, 0x0002);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 15, 0, 0xc440);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x9, 15, 0, 0x417f);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1c, 9, 9, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1c, 12, 10, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1c, 5, 3, 0x0005);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1c, 8, 6, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1c, 2, 0, 0x0002);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 15, 0, 0xc440);
        if (is_even)
-               rtpcs_sds_write_bits(sds, 0xb, 0x6, 3, 3, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x5, 15, 0, 0x8000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x6, 15, 0, 0x8000);
-       rtpcs_sds_write_bits(sds, 0xa, 0xa, 15, 0, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1e, 15, 0, 0x0002);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1f, 15, 0, 0xbe00);
+               rtpcs_sds_write_bits(sds, 0x2f, 0x6, 3, 3, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x5, 15, 0, 0x8000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x6, 15, 0, 0x8000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0xa, 15, 0, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1e, 15, 0, 0x0002);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1f, 15, 0, 0xbe00);
        if (is_even) {
-               rtpcs_sds_write_bits(sds, 0xb, 0xe, 10, 10, 0x0000);
-               rtpcs_sds_write_bits(sds, 0xb, 0xf, 10, 10, 0x0000);
-               rtpcs_sds_write_bits(sds, 0xb, 0xe, 14, 14, 0x0000);
-               rtpcs_sds_write_bits(sds, 0xb, 0xf, 14, 14, 0x0000);
+               rtpcs_sds_write_bits(sds, 0x2f, 0xe, 10, 10, 0x0000);
+               rtpcs_sds_write_bits(sds, 0x2f, 0xf, 10, 10, 0x0000);
+               rtpcs_sds_write_bits(sds, 0x2f, 0xe, 14, 14, 0x0000);
+               rtpcs_sds_write_bits(sds, 0x2f, 0xf, 14, 14, 0x0000);
        }
-       rtpcs_sds_write_bits(sds, 0xa, 0x10, 5, 5, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xb, 0x9, 8, 8, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x3, 15, 12, 0x000f);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1f, 13, 12, 0x0003);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1f, 11, 9, 0x0007);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 15, 15, 0x0001);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 14, 14, 0x0001);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 13, 13, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 12, 12, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 11, 9, 0x0002);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 8, 6, 0x0002);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 5, 3, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xb, 0x1, 2, 0, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xb, 0xc, 9, 9, 0x0001);
-       rtpcs_sds_write_bits(sds, 0xb, 0xd, 9, 9, 0x0001);
-       rtpcs_sds_write_bits(sds, 0xb, 0x8, 5, 5, 0x0001);
-       rtpcs_sds_write_bits(sds, 0xb, 0x8, 6, 6, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x1c, 15, 15, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x10, 15, 12, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x13, 4, 4, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x13, 9, 9, 0x0000);
-       rtpcs_sds_write_bits(sds, 0xa, 0x13, 3, 0, 0x0008);
-       rtpcs_sds_write_bits(sds, 0xa, 0x13, 8, 5, 0x0008);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x10, 5, 5, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x9, 8, 8, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x3, 15, 12, 0x000f);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1f, 13, 12, 0x0003);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1f, 11, 9, 0x0007);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 15, 15, 0x0001);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 14, 14, 0x0001);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 13, 13, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 12, 12, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 11, 9, 0x0002);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 8, 6, 0x0002);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 5, 3, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x1, 2, 0, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2f, 0xc, 9, 9, 0x0001);
+       rtpcs_sds_write_bits(sds, 0x2f, 0xd, 9, 9, 0x0001);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x8, 5, 5, 0x0001);
+       rtpcs_sds_write_bits(sds, 0x2f, 0x8, 6, 6, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x1c, 15, 15, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x10, 15, 12, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x13, 4, 4, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x13, 9, 9, 0x0000);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x13, 3, 0, 0x0008);
+       rtpcs_sds_write_bits(sds, 0x2e, 0x13, 8, 5, 0x0008);
 }
 
 static int rtpcs_839x_init_serdes_common(struct rtpcs_ctrl *ctrl)