arm.c (v7m_extra_costs): New table.

2013-11-28  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm.c (v7m_extra_costs): New table.
	(arm_v7m_tune): Use it.

From-SVN: r205484

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9ebecda6ecc618758665157de29e032e3497e237..777fe094d7dea85528433eba902e5a90a5bb2157 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-11-28  Terry Guo  <terry.guo@arm.com>
+
+       * config/arm/arm.c (v7m_extra_costs): New table.
+       (arm_v7m_tune): Use it.
+
 2013-11-28  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
        * config/sol2.h (TIME_LIBRARY): Define.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 129e4280ae2c33bba312e9352fcaf4ffeec83ba7..3b15ba8db83b9966139c06b23ef3968ad4658ba4 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1264,6 +1264,106 @@ const struct cpu_cost_table cortexa15_extra_costs =
   }
 };
 
+const struct cpu_cost_table v7m_extra_costs =
+{
+  /* ALU */
+  {
+    0,                 /* Arith.  */
+    0,                 /* Logical.  */
+    0,                 /* Shift.  */
+    0,                 /* Shift_reg.  */
+    0,                 /* Arith_shift.  */
+    COSTS_N_INSNS (1), /* Arith_shift_reg.  */
+    0,                 /* Log_shift.  */
+    COSTS_N_INSNS (1), /* Log_shift_reg.  */
+    0,                 /* Extend.  */
+    COSTS_N_INSNS (1), /* Extend_arith.  */
+    0,                 /* Bfi.  */
+    0,                 /* Bfx.  */
+    0,                 /* Clz.  */
+    COSTS_N_INSNS (1), /* non_exec.  */
+    false              /* non_exec_costs_exec.  */
+  },
+  {
+    /* MULT SImode */
+    {
+      COSTS_N_INSNS (1),       /* Simple.  */
+      COSTS_N_INSNS (1),       /* Flag_setting.  */
+      COSTS_N_INSNS (2),       /* Extend.  */
+      COSTS_N_INSNS (1),       /* Add.  */
+      COSTS_N_INSNS (3),       /* Extend_add.  */
+      COSTS_N_INSNS (8)                /* Idiv.  */
+    },
+    /* MULT DImode */
+    {
+      0,                       /* Simple (N/A).  */
+      0,                       /* Flag_setting (N/A).  */
+      COSTS_N_INSNS (2),       /* Extend.  */
+      0,                       /* Add (N/A).  */
+      COSTS_N_INSNS (3),       /* Extend_add.  */
+      0                                /* Idiv (N/A).  */
+    }
+  },
+  /* LD/ST */
+  {
+    COSTS_N_INSNS (2), /* Load.  */
+    0,                 /* Load_sign_extend.  */
+    COSTS_N_INSNS (3), /* Ldrd.  */
+    COSTS_N_INSNS (2), /* Ldm_1st.  */
+    1,                 /* Ldm_regs_per_insn_1st.  */
+    1,                 /* Ldm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (2), /* Loadf.  */
+    COSTS_N_INSNS (3), /* Loadd.  */
+    COSTS_N_INSNS (1),  /* Load_unaligned.  */
+    COSTS_N_INSNS (2), /* Store.  */
+    COSTS_N_INSNS (3), /* Strd.  */
+    COSTS_N_INSNS (2), /* Stm_1st.  */
+    1,                 /* Stm_regs_per_insn_1st.  */
+    1,                 /* Stm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (2), /* Storef.  */
+    COSTS_N_INSNS (3), /* Stored.  */
+    COSTS_N_INSNS (1)  /* Store_unaligned.  */
+  },
+  {
+    /* FP SFmode */
+    {
+      COSTS_N_INSNS (7),       /* Div.  */
+      COSTS_N_INSNS (2),       /* Mult.  */
+      COSTS_N_INSNS (5),       /* Mult_addsub.  */
+      COSTS_N_INSNS (3),       /* Fma.  */
+      COSTS_N_INSNS (1),       /* Addsub.  */
+      0,                       /* Fpconst.  */
+      0,                       /* Neg.  */
+      0,                       /* Compare.  */
+      0,                       /* Widen.  */
+      0,                       /* Narrow.  */
+      0,                       /* Toint.  */
+      0,                       /* Fromint.  */
+      0                                /* Roundint.  */
+    },
+    /* FP DFmode */
+    {
+      COSTS_N_INSNS (15),      /* Div.  */
+      COSTS_N_INSNS (5),       /* Mult.  */
+      COSTS_N_INSNS (7),       /* Mult_addsub.  */
+      COSTS_N_INSNS (7),       /* Fma.  */
+      COSTS_N_INSNS (3),       /* Addsub.  */
+      0,                       /* Fpconst.  */
+      0,                       /* Neg.  */
+      0,                       /* Compare.  */
+      0,                       /* Widen.  */
+      0,                       /* Narrow.  */
+      0,                       /* Toint.  */
+      0,                       /* Fromint.  */
+      0                                /* Roundint.  */
+    }
+  },
+  /* Vector */
+  {
+    COSTS_N_INSNS (1)  /* Alu.  */
+  }
+};
+
 const struct tune_params arm_slowmul_tune =
 {
   arm_slowmul_rtx_costs,
@@ -1473,7 +1573,7 @@ const struct tune_params arm_cortex_a9_tune =
 const struct tune_params arm_v7m_tune =
 {
   arm_9e_rtx_costs,
-  &generic_extra_costs,
+  &v7m_extra_costs,
   NULL,                                                /* Sched adj cost.  */
   1,                                           /* Constant limit.  */
   5,                                           /* Max cond insns.  */