arm64: dts: qcom: Add MST pixel streams for displayport

Update Qualcomm DT files in order to declare extra stream pixel clocks
and extra register resources used on these platforms to support
DisplayPort MST.

The driver will continue to work with the old DTS files as even after
adding MST support the driver will have to support old DTS files which
didn't have MST clocks.

Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250916-dp_mst_bindings-v9-2-68c674b39d8e@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 48f753002fc459a3e9fac0c0e98cbec6013fea0f..cf685cb186edcade643790ba22f6a900beb85679 100644 (file)
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5070,7 +5070,11 @@
                                      <0x0 0x0af54200 0x0 0x0c0>,
                                      <0x0 0x0af55000 0x0 0x770>,
                                      <0x0 0x0af56000 0x0 0x09c>,
-                                     <0x0 0x0af57000 0x0 0x09c>;
+                                     <0x0 0x0af57000 0x0 0x09c>,
+                                     <0x0 0x0af58000 0x0 0x09c>,
+                                     <0x0 0x0af59000 0x0 0x09c>,
+                                     <0x0 0x0af5a000 0x0 0x23c>,
+                                     <0x0 0x0af5b000 0x0 0x23c>;
 
                                interrupt-parent = <&mdss0>;
                                interrupts = <12>;
@@ -5079,15 +5083,28 @@
                                         <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK>,
+                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK>,
+                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel",
+                                             "stream_2_pixel",
+                                             "stream_3_pixel";
                                assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>;
+                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>,
+                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK_SRC>,
+                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK_SRC>;
+                               assigned-clock-parents = <&mdss0_dp0_phy 0>,
+                                                        <&mdss0_dp0_phy 1>,
+                                                        <&mdss0_dp0_phy 1>,
+                                                        <&mdss0_dp0_phy 1>,
+                                                        <&mdss0_dp0_phy 1>;
                                phys = <&mdss0_dp0_phy>;
                                phy-names = "dp";
 
@@ -5149,7 +5166,11 @@
                                      <0x0 0x0af5c200 0x0 0x0c0>,
                                      <0x0 0x0af5d000 0x0 0x770>,
                                      <0x0 0x0af5e000 0x0 0x09c>,
-                                     <0x0 0x0af5f000 0x0 0x09c>;
+                                     <0x0 0x0af5f000 0x0 0x09c>,
+                                     <0x0 0x0af60000 0x0 0x09c>,
+                                     <0x0 0x0af61000 0x0 0x09c>,
+                                     <0x0 0x0af62000 0x0 0x23c>,
+                                     <0x0 0x0af63000 0x0 0x23c>;
 
                                interrupt-parent = <&mdss0>;
                                interrupts = <13>;
@@ -5158,15 +5179,20 @@
                                         <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_AUX_CLK>,
                                         <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_CLK>,
                                         <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
-                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+                                        <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
                                assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
-                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss0_dp1_phy 0>, <&mdss0_dp1_phy 1>;
+                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+                                                 <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
+                               assigned-clock-parents = <&mdss0_dp1_phy 0>,
+                                                        <&mdss0_dp1_phy 1>,
+                                                        <&mdss0_dp1_phy 1>;
                                phys = <&mdss0_dp1_phy>;
                                phy-names = "dp";
 

diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
index 96c4d2e06d9a9ec22d968c1e4bbb5723f18223d1..d65ad0df686523c283a1bc878bf77adaa68ffab5 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
@@ -2144,16 +2144,20 @@
                                         <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>;

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 4ac909214a8690111b2596d36a8e6e79d0f05131..4b04dea57ec8cc652e37f1d93c410404adaadd5d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -5144,7 +5144,8 @@
                                reg = <0 0x0aea0000 0 0x200>,
                                      <0 0x0aea0200 0 0x200>,
                                      <0 0x0aea0400 0 0xc00>,
-                                     <0 0x0aea1000 0 0x400>;
+                                     <0 0x0aea1000 0 0x400>,
+                                     <0 0x0aea1400 0 0x400>;
 
                                interrupt-parent = <&mdss>;
                                interrupts = <14>;

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 815095c2f8c751e6bd421c10f43c55ae3b7aae04..85c2afcb417def2be3d99026c7febd9f9db25da3 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3256,16 +3256,20 @@
                                         <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_prim_qmpphy QMP_USB43DP_DP_PHY>;
@@ -3334,16 +3338,20 @@
                                         <&dispcc DISP_CC_MDSS_DP_AUX1_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK1_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK1_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK1_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_sec_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_sec_qmpphy QMP_USB43DP_DP_PHY>;
@@ -3404,7 +3412,8 @@
                                reg = <0 0xae9a000 0 0x200>,
                                      <0 0xae9a200 0 0x200>,
                                      <0 0xae9a400 0 0x600>,
-                                     <0 0xae9aa00 0 0x400>;
+                                     <0 0xae9aa00 0 0x400>,
+                                     <0 0xae9b000 0 0x400>;
                                interrupt-parent = <&mdss>;
                                interrupts = <14>;
                                clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 225233a37a4fd9f3d65735915c0338a993a322d1..279e5e6beae2099f26b8e0b8576cd6c99fa856ef 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -4706,15 +4706,19 @@
                                         <&dispcc0 DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
                                clock-names = "core_iface", "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+                                                 <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_0_qmpphy QMP_USB43DP_DP_PHY>;
@@ -4785,14 +4789,18 @@
                                         <&dispcc0 DISP_CC_MDSS_DPTX1_AUX_CLK>,
                                         <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK>,
                                         <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
-                                        <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+                                        <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+                                        <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
                                clock-names = "core_iface", "core_aux",
                                              "ctrl_link",
-                                             "ctrl_link_iface", "stream_pixel";
+                                             "ctrl_link_iface", "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
-                                                 <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
+                                                 <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+                                                 <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
@@ -4862,10 +4870,12 @@
                                         <&dispcc0 DISP_CC_MDSS_DPTX2_AUX_CLK>,
                                         <&dispcc0 DISP_CC_MDSS_DPTX2_LINK_CLK>,
                                         <&dispcc0 DISP_CC_MDSS_DPTX2_LINK_INTF_CLK>,
-                                        <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>;
+                                        <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>,
+                                        <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL1_CLK>;
                                clock-names = "core_iface", "core_aux",
                                              "ctrl_link",
-                                             "ctrl_link_iface", "stream_pixel";
+                                             "ctrl_link_iface", "stream_pixel",
+                                             "stream_1_pixel";
                                interrupt-parent = <&mdss0>;
                                interrupts = <14>;
                                phys = <&mdss0_dp2_phy>;
@@ -4873,8 +4883,11 @@
                                power-domains = <&rpmhpd SC8280XP_MMCX>;
 
                                assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX2_LINK_CLK_SRC>,
-                                                 <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss0_dp2_phy 0>, <&mdss0_dp2_phy 1>;
+                                                 <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>,
+                                                 <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC>;
+                               assigned-clock-parents = <&mdss0_dp2_phy 0>,
+                                                        <&mdss0_dp2_phy 1>,
+                                                        <&mdss0_dp2_phy 1>;
                                operating-points-v2 = <&mdss0_dp2_opp_table>;
 
                                #sound-dai-cells = <0>;
@@ -6043,10 +6056,12 @@
                                         <&dispcc1 DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc1 DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc1 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
                                clock-names = "core_iface", "core_aux",
                                              "ctrl_link",
-                                             "ctrl_link_iface", "stream_pixel";
+                                             "ctrl_link_iface", "stream_pixel",
+                                             "stream_1_pixel";
                                interrupt-parent = <&mdss1>;
                                interrupts = <12>;
                                phys = <&mdss1_dp0_phy>;
@@ -6054,8 +6069,11 @@
                                power-domains = <&rpmhpd SC8280XP_MMCX>;
 
                                assigned-clocks = <&dispcc1 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss1_dp0_phy 0>, <&mdss1_dp0_phy 1>;
+                                                 <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
+                               assigned-clock-parents = <&mdss1_dp0_phy 0>,
+                                                        <&mdss1_dp0_phy 1>,
+                                                        <&mdss1_dp0_phy 1>;
                                operating-points-v2 = <&mdss1_dp0_opp_table>;
 
                                #sound-dai-cells = <0>;
@@ -6118,10 +6136,12 @@
                                         <&dispcc1 DISP_CC_MDSS_DPTX1_AUX_CLK>,
                                         <&dispcc1 DISP_CC_MDSS_DPTX1_LINK_CLK>,
                                         <&dispcc1 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
-                                        <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+                                        <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+                                        <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
                                clock-names = "core_iface", "core_aux",
                                              "ctrl_link",
-                                             "ctrl_link_iface", "stream_pixel";
+                                             "ctrl_link_iface", "stream_pixel",
+                                             "stream_1_pixel";
                                interrupt-parent = <&mdss1>;
                                interrupts = <13>;
                                phys = <&mdss1_dp1_phy>;
@@ -6129,8 +6149,11 @@
                                power-domains = <&rpmhpd SC8280XP_MMCX>;
 
                                assigned-clocks = <&dispcc1 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
-                                                 <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss1_dp1_phy 0>, <&mdss1_dp1_phy 1>;
+                                                 <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+                                                 <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
+                               assigned-clock-parents = <&mdss1_dp1_phy 0>,
+                                                        <&mdss1_dp1_phy 1>,
+                                                        <&mdss1_dp1_phy 1>;
                                operating-points-v2 = <&mdss1_dp1_opp_table>;
 
                                #sound-dai-cells = <0>;
@@ -6193,10 +6216,12 @@
                                         <&dispcc1 DISP_CC_MDSS_DPTX2_AUX_CLK>,
                                         <&dispcc1 DISP_CC_MDSS_DPTX2_LINK_CLK>,
                                         <&dispcc1 DISP_CC_MDSS_DPTX2_LINK_INTF_CLK>,
-                                        <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>;
+                                        <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>,
+                                        <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL1_CLK>;
                                clock-names = "core_iface", "core_aux",
                                              "ctrl_link",
-                                             "ctrl_link_iface", "stream_pixel";
+                                             "ctrl_link_iface", "stream_pixel",
+                                             "stream_1_pixel";
                                interrupt-parent = <&mdss1>;
                                interrupts = <14>;
                                phys = <&mdss1_dp2_phy>;
@@ -6204,8 +6229,11 @@
                                power-domains = <&rpmhpd SC8280XP_MMCX>;
 
                                assigned-clocks = <&dispcc1 DISP_CC_MDSS_DPTX2_LINK_CLK_SRC>,
-                                                 <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss1_dp2_phy 0>, <&mdss1_dp2_phy 1>;
+                                                 <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>,
+                                                 <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC>;
+                               assigned-clock-parents = <&mdss1_dp2_phy 0>,
+                                                        <&mdss1_dp2_phy 1>,
+                                                        <&mdss1_dp2_phy 1>;
                                operating-points-v2 = <&mdss1_dp2_opp_table>;
 
                                #sound-dai-cells = <0>;

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index f322ebf3b4c21c2f4f284e4d9b41f5a2b1ecfd73..13c9515260ef171121607e1b8434f64c4934720f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4656,12 +4656,19 @@
                                         <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
-                               clock-names = "core_iface", "core_aux", "ctrl_link",
-                                             "ctrl_link_iface", "stream_pixel";
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
+                               clock-names = "core_iface",
+                                             "core_aux",
+                                             "ctrl_link",
+                                             "ctrl_link_iface",
+                                             "stream_pixel",
+                                             "stream_1_pixel";
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
                                phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
                                phy-names = "dp";

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 37478c76aceec52351261d019bf528a4c0be1028..acdba79612aa8f8ad714ffd93d84ac572afdd47a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3890,16 +3890,20 @@
                                         <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 6591b8172e089453b02208fbcd7a40abbf42e4f9..50dd11432bb2e8d4e9c811b31192331c424f205c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4771,16 +4771,20 @@
                                         <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index de1fae97ce447b47db1fab3abaa6456478fe04b3..fc4ce9d4977e811c993291a3b5c8ed477b69c75e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2876,16 +2876,20 @@
                                         <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index e9ffa0af3cb3de07ef3c088327da86bd89f95e30..23420e6924728cb80fc9e44fb4d7e01fbffae21f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3434,16 +3434,20 @@
                                         <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index ec67efd64b78673352c4c6e3a4e7e504d4525b46..7724dba75db79a9e66a2c61e1ea3607bacfdf5bb 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3759,16 +3759,20 @@
                                         <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>;

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index e7582a19184b48de66d572d6e98fbf2f36a8c17f..ebf1971b1bfbebf4df5a80247a6682ac8e413e3b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5660,16 +5660,20 @@
                                         <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                operating-points-v2 = <&dp_opp_table>;

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index a6305077f150d59ef8fdbd13fe3ba03d43646c91..51576d9c935decbc61a8e4200de83e739f7da814 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -5476,16 +5476,20 @@
                                         <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_ss0_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                operating-points-v2 = <&mdss_dp0_opp_table>;
@@ -5560,16 +5564,20 @@
                                         <&dispcc DISP_CC_MDSS_DPTX1_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX1_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_ss1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                operating-points-v2 = <&mdss_dp1_opp_table>;
@@ -5644,16 +5652,20 @@
                                         <&dispcc DISP_CC_MDSS_DPTX2_AUX_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX2_LINK_CLK>,
                                         <&dispcc DISP_CC_MDSS_DPTX2_LINK_INTF_CLK>,
-                                        <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK>;
+                                        <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DPTX2_PIXEL1_CLK>;
                                clock-names = "core_iface",
                                              "core_aux",
                                              "ctrl_link",
                                              "ctrl_link_iface",
-                                             "stream_pixel";
+                                             "stream_pixel",
+                                             "stream_1_pixel";
 
                                assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX2_LINK_CLK_SRC>,
-                                                 <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>;
+                                                 <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC>;
                                assigned-clock-parents = <&usb_1_ss2_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                                                        <&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                                                         <&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
 
                                operating-points-v2 = <&mdss_dp2_opp_table>;