RISC-V: Provide FP conditional-branch instructions for if-conversion

Do not expand floating-point conditional-branch RTL instructions right
away that use a comparison operation that is either directly available
as a machine conditional-set instruction or is NE, which can be emulated
by EQ.  This is so that if-conversion sees them in their original form
and can produce fewer operations tried in a branchless code sequence
compared to when such an instruction has been already converted to a
sequence of a floating-point conditional-set RTL instruction followed by
an integer conditional-branch RTL instruction.  Split any floating-point
conditional-branch RTL instructions still remaining after reload then.

Adjust the testsuite accordingly: since the middle end uses the inverse
condition internally, an inverse conditional-set instruction may make it
to assembly output and also `cond_move_process_if_block' will be used by
if-conversion rather than `noce_process_if_block', because the latter
function not yet been updated to handle inverted conditions.

	gcc/
	* config/riscv/predicates.md (ne_operator): New predicate.
	* config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
	floating-point condition.
	* config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
	(@cbranch<ANYF:mode>4): ... this.  Only expand the RTX via
	`riscv_expand_conditional_branch' for `!signed_order_operator'
	operators, otherwise let it through.
	(*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
	splitters.

	gcc/testsuite/
	* gcc.target/riscv/movdifge-sfb.c: Reject "if-conversion
	succeeded through" rather than accepting it.
	* gcc.target/riscv/movdifge-thead.c: Likewise.
	* gcc.target/riscv/movdifge-ventana.c: Likewise.
	* gcc.target/riscv/movdifge-zicond.c: Likewise.
	* gcc.target/riscv/movdifgt-sfb.c: Likewise.
	* gcc.target/riscv/movdifgt-thead.c: Likewise.
	* gcc.target/riscv/movdifgt-ventana.c: Likewise.
	* gcc.target/riscv/movdifgt-zicond.c: Likewise.
	* gcc.target/riscv/movdifle-sfb.c: Likewise.
	* gcc.target/riscv/movdifle-thead.c: Likewise.
	* gcc.target/riscv/movdifle-ventana.c: Likewise.
	* gcc.target/riscv/movdifle-zicond.c: Likewise.
	* gcc.target/riscv/movdiflt-sfb.c: Likewise.
	* gcc.target/riscv/movdiflt-thead.c: Likewise.
	* gcc.target/riscv/movdiflt-ventana.c: Likewise.
	* gcc.target/riscv/movdiflt-zicond.c: Likewise.
	* gcc.target/riscv/movsifge-sfb.c: Likewise.
	* gcc.target/riscv/movsifge-thead.c: Likewise.
	* gcc.target/riscv/movsifge-ventana.c: Likewise.
	* gcc.target/riscv/movsifge-zicond.c: Likewise.
	* gcc.target/riscv/movsifgt-sfb.c: Likewise.
	* gcc.target/riscv/movsifgt-thead.c: Likewise.
	* gcc.target/riscv/movsifgt-ventana.c: Likewise.
	* gcc.target/riscv/movsifgt-zicond.c: Likewise.
	* gcc.target/riscv/movsifle-sfb.c: Likewise.
	* gcc.target/riscv/movsifle-thead.c: Likewise.
	* gcc.target/riscv/movsifle-ventana.c: Likewise.
	* gcc.target/riscv/movsifle-zicond.c: Likewise.
	* gcc.target/riscv/movsiflt-sfb.c: Likewise.
	* gcc.target/riscv/movsiflt-thead.c: Likewise.
	* gcc.target/riscv/movsiflt-ventana.c: Likewise.
	* gcc.target/riscv/movsiflt-zicond.c: Likewise.
	* gcc.target/riscv/smax-ieee.c: Also accept FLT.D.
	* gcc.target/riscv/smaxf-ieee.c: Also accept FLT.S.
	* gcc.target/riscv/smin-ieee.c: Also accept FGT.D.
	* gcc.target/riscv/sminf-ieee.c: Also accept FGT.S.

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index f943f31f4db4ee15d05b5dfbe872733e706a3466..271c07ab0cf7d36d9d3ae990cdacf9b27bc37388 100644 (file)
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -333,6 +333,9 @@
 (define_predicate "modular_operator"
   (match_code "plus,minus,mult,ashift"))
 
+(define_predicate "ne_operator"
+  (match_code "ne"))
+
 (define_predicate "equality_operator"
   (match_code "eq,ne"))
 

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index ef6569ed15ff781cc1b03eb41eb29fa4147cb4b1..998984cfbe639a5dc9331796494ff34fd3d7bc34 100644 (file)
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3337,7 +3337,9 @@ riscv_address_cost (rtx addr, machine_mode mode,
    calculation for conditional branches: one unit is considered the cost
    of microarchitecture-dependent actual branch execution and therefore
    multiplied by BRANCH_COST and any remaining units are considered fixed
-   branch overhead.  */
+   branch overhead.  Branches on a floating-point condition incur an extra
+   instruction cost as they will be split into an FCMP operation followed
+   by a branch on an integer condition.  */
 
 static int
 riscv_insn_cost (rtx_insn *insn, bool speed)
@@ -3345,11 +3347,19 @@ riscv_insn_cost (rtx_insn *insn, bool speed)
   rtx x = PATTERN (insn);
   int cost = pattern_cost (x, speed);
 
-  if (JUMP_P (insn)
-      && GET_CODE (x) == SET
-      && GET_CODE (SET_DEST (x)) == PC
-      && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
-    cost += COSTS_N_INSNS (BRANCH_COST (speed, false) - 1);
+  if (JUMP_P (insn))
+    {
+      if (GET_CODE (x) == PARALLEL)
+       x = XVECEXP (x, 0, 0);
+      if (GET_CODE (x) == SET
+         && GET_CODE (SET_DEST (x)) == PC
+         && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
+       {
+         cost += COSTS_N_INSNS (BRANCH_COST (speed, false) - 1);
+         if (FLOAT_MODE_P (GET_MODE (XEXP (XEXP (SET_SRC (x), 0), 0))))
+           cost += COSTS_N_INSNS (1);
+       }
+    }
   return cost;
 }
 

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 86f89da8a42f44cb4fd8ca8279e05a964617f748..c4db7a7aa7429323bb1a1783e850516339c7f816 100644 (file)
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2750,20 +2750,89 @@
   DONE;
 })
 
-(define_expand "@cbranch<mode>4"
-  [(set (pc)
-       (if_then_else (match_operator 0 "fp_branch_comparison"
-                      [(match_operand:ANYF 1 "register_operand")
-                       (match_operand:ANYF 2 "register_operand")])
-                     (label_ref (match_operand 3 ""))
-                     (pc)))]
+(define_expand "@cbranch<ANYF:mode>4"
+  [(parallel [(set (pc)
+                  (if_then_else (match_operator 0 "fp_branch_comparison"
+                                 [(match_operand:ANYF 1 "register_operand")
+                                  (match_operand:ANYF 2 "register_operand")])
+                                (label_ref (match_operand 3 ""))
+                                (pc)))
+             (clobber (match_operand 4 ""))])]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
 {
-  riscv_expand_conditional_branch (operands[3], GET_CODE (operands[0]),
-                                  operands[1], operands[2]);
-  DONE;
+  if (!signed_order_operator (operands[0], GET_MODE (operands[0])))
+    {
+      riscv_expand_conditional_branch (operands[3], GET_CODE (operands[0]),
+                                      operands[1], operands[2]);
+      DONE;
+    }
+  operands[4] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);
 })
 
+(define_insn_and_split "*cbranch<ANYF:mode>4"
+  [(set (pc)
+       (if_then_else (match_operator 1 "fp_native_comparison"
+                      [(match_operand:ANYF 2 "register_operand" "f")
+                       (match_operand:ANYF 3 "register_operand" "f")])
+                     (label_ref (match_operand 0 ""))
+                     (pc)))
+   (clobber (match_operand:X 4 "register_operand" "=r"))]
+  "TARGET_HARD_FLOAT || TARGET_ZFINX"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 4)
+       (match_op_dup:X 1 [(match_dup 2) (match_dup 3)]))
+   (set (pc)
+       (if_then_else (ne:X (match_dup 4) (const_int 0))
+                     (label_ref (match_operand 0))
+                     (pc)))]
+  ""
+  [(set_attr "type" "branch")
+   (set (attr "length")
+       (if_then_else (and (le (minus (match_dup 0) (pc))
+                              (const_int 4084))
+                          (le (minus (pc) (match_dup 0))
+                              (const_int 4096)))
+                     (const_int 8)
+                     (if_then_else (and (le (minus (match_dup 0) (pc))
+                                            (const_int 1048564))
+                                        (le (minus (pc) (match_dup 0))
+                                            (const_int 1048576)))
+                                   (const_int 12)
+                                   (const_int 16))))])
+
+(define_insn_and_split "*cbranch<ANYF:mode>4"
+  [(set (pc)
+       (if_then_else (match_operator 1 "ne_operator"
+                      [(match_operand:ANYF 2 "register_operand" "f")
+                       (match_operand:ANYF 3 "register_operand" "f")])
+                     (label_ref (match_operand 0 ""))
+                     (pc)))
+   (clobber (match_operand:X 4 "register_operand" "=r"))]
+  "TARGET_HARD_FLOAT || TARGET_ZFINX"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 4)
+       (eq:X (match_dup 2) (match_dup 3)))
+   (set (pc)
+       (if_then_else (eq:X (match_dup 4) (const_int 0))
+                     (label_ref (match_operand 0))
+                     (pc)))]
+  ""
+  [(set_attr "type" "branch")
+   (set (attr "length")
+       (if_then_else (and (le (minus (match_dup 0) (pc))
+                              (const_int 4084))
+                          (le (minus (pc) (match_dup 0))
+                              (const_int 4096)))
+                     (const_int 8)
+                     (if_then_else (and (le (minus (match_dup 0) (pc))
+                                            (const_int 1048564))
+                                        (le (minus (pc) (match_dup 0))
+                                            (const_int 1048576)))
+                                   (const_int 12)
+                                   (const_int 16))))])
+
 (define_insn_and_split "*branch_on_bit<X:mode>"
   [(set (pc)
        (if_then_else

diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c b/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c
index 1d1f9549a68c80cb5f33a2e10d8857784c45fa3e..b5eb0f40dffac7e71d8a232045c4c8c7f60d61d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c
@@ -20,7 +20,7 @@ movdifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-thead.c b/gcc/testsuite/gcc.target/riscv/movdifge-thead.c
index 116e75bd8d637c4cf59412bd5de42dbf8c199e80..6fb210ccc8d7784fbc236825c356fb5086185589 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifge-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-thead.c
@@ -18,7 +18,7 @@ movdifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c b/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c
index 18c924cc2d3d7f0baaea0f4f469a1fda3cf9ea6a..be33171d109befe47846762a5cdd771df4f2c65b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c
@@ -20,7 +20,7 @@ movdifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c b/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c
index ccb9f385db7a74a3e5fffdbbff992704e19fb3bb..0c6a10fee28b576352eee25a183bd2a408df3018 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c
@@ -20,7 +20,7 @@ movdifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c b/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c
index a5edace43a95dceb3fe70f4433538f61cce09feb..0fc5a1caa62b0da03478db74a5a8367210dd8e93 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c
@@ -20,7 +20,7 @@ movdifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c b/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c
index 904ce054c7ba060c68984ea69eeef489db2f856f..1eece07afcde51864d6ff70d95cfb6d233c64c1a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c
@@ -18,7 +18,7 @@ movdifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c b/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c
index cffbd3e60cad56416a7b439bbed4aa98b61fc785..7df01a64952173e00204b90a56d829c6ec01d3a6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c
@@ -20,7 +20,7 @@ movdifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c b/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c
index 453b948fc15b2a1b1206a34e2b0b7415b3f25ac2..6b18e8f46781addcc61f808d6dbe185704728687 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c
@@ -20,7 +20,7 @@ movdifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c b/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c
index e22fce105ba8811f155fdef27e9baa205c29fa22..475c7f2d25a56e1fd8fe427cd1fce5e14c12daa3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c
@@ -20,7 +20,7 @@ movdifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-thead.c b/gcc/testsuite/gcc.target/riscv/movdifle-thead.c
index 05d39d6cc3db5f36773c73766597f148dbed25ca..9ee0dbb7da4fd361b18a63c492a7b2c77a85b926 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifle-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-thead.c
@@ -18,7 +18,7 @@ movdifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c b/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c
index 677e679d1946b908d6f352a63791b539638fa7df..d6f67ae940d00f15c3b73803c9cd7b41ed275e66 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c
@@ -20,7 +20,7 @@ movdifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c b/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c
index 270913533491f3989c87932ce9e923c17e0cd7ba..c1f13b7f5dc35b67678da6015b22be724ea34a94 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c
@@ -20,7 +20,7 @@ movdifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c b/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c
index 0f07997be0e999d455a5c913e2a636b2f9dbe1d9..c116fe315b4d38234e91cd646135f9ca3c96c53e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c
@@ -20,7 +20,7 @@ movdiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c b/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c
index 9c5df857fba265cdec62728356d639bf9a6f2ab4..f4f210c02a91c19fb796a918eba996ee1c209763 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c
@@ -18,7 +18,7 @@ movdiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c b/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c
index af882b905eacfb81f243b3ced5cfcfa58f14a176..049b77c2b8bc688033a898e9a24439609318ed14 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c
@@ -20,7 +20,7 @@ movdiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c b/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c
index 64a4cf15255f5d22fd4d43c47ff53d78028442c8..6a1d7cea19f5e366ef0a81eb33b2cf1468bd2ca5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c
@@ -20,7 +20,7 @@ movdiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c b/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c
index 31eae9176b6b91ae33fd93562ca3d841475c8b4e..c9f0e2dfa50f79cdd4a6ee2d544b9743f2740ad7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c
@@ -20,7 +20,7 @@ movsifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-thead.c b/gcc/testsuite/gcc.target/riscv/movsifge-thead.c
index 1fb542ed1e213ad75be6fdfb871bdee1a2f93686..893a522ac5ff7773896f9851df4501704c1a2d1f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifge-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-thead.c
@@ -18,7 +18,7 @@ movsifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c b/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c
index 3d2ba7122b7f603d4abacbc6786538cdd619367e..26e55b6d867a283b35ade9b60a6a56c2bb3a8591 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c
@@ -20,7 +20,7 @@ movsifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c b/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c
index 1a6f52f8360f4764cdb629ef09e5c575f8d80843..e38aa80bf0dcbfcc8827fbe4e08228307c843a42 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c
@@ -20,7 +20,7 @@ movsifge (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c b/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c
index f13f6aecd72bd1c4126f3e4c88cd411d34c8e717..47ea2c2149d269407a4d362fdfb9cd1fb6c09dbb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c
@@ -20,7 +20,7 @@ movsifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c b/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c
index ca77e80b52586af6e0baf301c0ce49e8812276dd..0ec4e575f8791e502e0816745b27fb72e6b18837 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c
@@ -18,7 +18,7 @@ movsifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c b/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c
index 4dae496a405f41197749b0668dfd74ac87054944..8896266e243d64c8af1fff863dc48213fa7901e7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c
@@ -20,7 +20,7 @@ movsifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c b/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c
index 87eaa98488f6b3ae505620b70c6f2e54b1f04476..bada72f44d850dd52e552354794b9f8814b765d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c
@@ -20,7 +20,7 @@ movsifgt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c b/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c
index a636a9169a9f1ffbb3746601dc2b7c8c62b1bfaa..7cb9167cd13733670470b576ca920537ea980af3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c
@@ -20,7 +20,7 @@ movsifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-thead.c b/gcc/testsuite/gcc.target/riscv/movsifle-thead.c
index 67c5822a5f44a51ceb4011fa33c0cd04e0a709d1..b05a02a44f984397539ac6ffbe5b7b21e2887510 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifle-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-thead.c
@@ -18,7 +18,7 @@ movsifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c b/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c
index 14d5298af23b0693d2980c391cdf264a9c8579fd..24b49d9dffc8a5bfb7580ec5824c8e716c0ed2ce 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c
@@ -20,7 +20,7 @@ movsifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c b/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c
index f5e9e90de91103f15da32f8b9c686f7e307c7ffd..5aad91007ea1e5dfd2f33f61b5ba7354ffe03ae7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c
@@ -20,7 +20,7 @@ movsifle (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c b/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c
index 7c1f8e08c9ab38656a3972ef1f81fa47636063f6..110e38a49e65f5d34881c28833aad6bb9eed69bc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c
@@ -20,7 +20,7 @@ movsiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c b/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c
index f63cb25b4c4f89f9fc3b8a1877342365c330e1b8..124c408718b50b80a56acca435fcbd78a8c8f15a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c
@@ -18,7 +18,7 @@ movsiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
 /* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c b/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c
index c0b88869633d26de2529a31e7754913ce7028274..911a5029dda620ce0c3036656f7d9b56085e32d6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c
@@ -20,7 +20,7 @@ movsiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c b/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c
index d2e2550ad1f630ae47f1a3eec1b2d080c3f8767b..7db2b994fc5c68713e885e060c9edffac1dd2bcb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c
@@ -20,7 +20,7 @@ movsiflt (double w, double x, int_t y, int_t z)
  */
 
 /* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
 /* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
 /* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/smax-ieee.c b/gcc/testsuite/gcc.target/riscv/smax-ieee.c
index 2dbccefe2f4d407cbc503371fdd94121e7cdeb90..775e515cf38415fa5976a194d13dde839dc69df6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/smax-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/smax-ieee.c
@@ -10,4 +10,4 @@ smax (double x, double y)
 
 /* { dg-final { scan-assembler-not "\t(call|tail)\tfmax\t" } } */
 /* { dg-final { scan-assembler-not "\tfmax\\.d\t" } } */
-/* { dg-final { scan-assembler "\tfge\\.d\t" } } */
+/* { dg-final { scan-assembler "\t(fge\\.d|flt\\.d)\t" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c b/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c
index 31b9bfa4d91e5313ed64150d9d161efd895a6e6d..c794bc3b02fc4d9aab23002bb57c1ffcd0b54a4e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c
@@ -10,4 +10,4 @@ smaxf (float x, float y)
 
 /* { dg-final { scan-assembler-not "\t(call|tail)\tfmaxf\t" } } */
 /* { dg-final { scan-assembler-not "\tfmax\\.s\t" } } */
-/* { dg-final { scan-assembler "\tfge\\.s\t" } } */
+/* { dg-final { scan-assembler "\t(fge\\.s|flt\\.s)\t" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/smin-ieee.c b/gcc/testsuite/gcc.target/riscv/smin-ieee.c
index ea36c2de89fe552da06f1e2f70efbb75806e692e..28cedd3bea5dbc3186d42ca51eeb5beb067dac02 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/smin-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/smin-ieee.c
@@ -10,4 +10,4 @@ smin (double x, double y)
 
 /* { dg-final { scan-assembler-not "\t(call|tail)\tfmin\t" } } */
 /* { dg-final { scan-assembler-not "\tfmin\\.d\t" } } */
-/* { dg-final { scan-assembler "\tfle\\.d\t" } } */
+/* { dg-final { scan-assembler "\t(fgt\\.d|fle\\.d)\t" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sminf-ieee.c b/gcc/testsuite/gcc.target/riscv/sminf-ieee.c
index 427617af08f1fb108feb0a441ed6417d7b90d748..18d485865e1da679e90bc0ff39a95d96740af2b6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sminf-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/sminf-ieee.c
@@ -10,4 +10,4 @@ sminf (float x, float y)
 
 /* { dg-final { scan-assembler-not "\t(call|tail)\tfminf\t" } } */
 /* { dg-final { scan-assembler-not "\tfmin\\.s\t" } } */
-/* { dg-final { scan-assembler "\tfle\\.s\t" } } */
+/* { dg-final { scan-assembler "\t(fgt\\.s|fle\\.s)\t" } } */