]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/msm/dpu: Fix pixel extension sub-sampling
authorVladimir Lypak <vladimir.lypak@gmail.com>
Fri, 17 Oct 2025 19:58:38 +0000 (19:58 +0000)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Tue, 28 Oct 2025 22:20:47 +0000 (00:20 +0200)
In _dpu_plane_setup_pixel_ext function instead of dividing just chroma
source resolution once (component 1 and 2), second component is divided
once more because src_w and src_h variable is reused between iterations.
Third component receives wrong source resolution too (from component 2).
To fix this introduce temporary variables for each iteration.

Fixes: dabfdd89eaa9 ("drm/msm/disp/dpu1: add inline rotation support for sc7280")
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/681921/
Link: https://lore.kernel.org/r/20251017-b4-dpu-fixes-v1-4-40ce5993eeb6@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

index 6effe0fa4837284a1f038e4907c4c91d239aeb8b..905524ceeb1f192c093f1be7f571b29eb4b53379 100644 (file)
@@ -500,13 +500,15 @@ static void _dpu_plane_setup_pixel_ext(struct dpu_hw_scaler3_cfg *scale_cfg,
        int i;
 
        for (i = 0; i < DPU_MAX_PLANES; i++) {
+               uint32_t w = src_w, h = src_h;
+
                if (i == DPU_SSPP_COMP_1_2 || i == DPU_SSPP_COMP_2) {
-                       src_w /= chroma_subsmpl_h;
-                       src_h /= chroma_subsmpl_v;
+                       w /= chroma_subsmpl_h;
+                       h /= chroma_subsmpl_v;
                }
 
-               pixel_ext->num_ext_pxls_top[i] = src_h;
-               pixel_ext->num_ext_pxls_left[i] = src_w;
+               pixel_ext->num_ext_pxls_top[i] = h;
+               pixel_ext->num_ext_pxls_left[i] = w;
        }
 }