--- /dev/null
+From eb4f756915875b0ea0757751cd29841f0504d547 Mon Sep 17 00:00:00 2001
+From: Wang Kefeng <wangkefeng.wang@huawei.com>
+Date: Mon, 23 Aug 2021 10:41:42 +0100
+Subject: ARM: 9120/1: Revert "amba: make use of -1 IRQs warn"
+
+From: Wang Kefeng <wangkefeng.wang@huawei.com>
+
+commit eb4f756915875b0ea0757751cd29841f0504d547 upstream.
+
+After commit 77a7300abad7 ("of/irq: Get rid of NO_IRQ usage"),
+no irq case has been removed, irq_of_parse_and_map() will return
+0 in all cases when get error from parse and map an interrupt into
+linux virq space.
+
+amba_device_register() is only used on no-DT initialization, see
+ s3c64xx_pl080_init() arch/arm/mach-s3c/pl080.c
+ ep93xx_init_devices() arch/arm/mach-ep93xx/core.c
+
+They won't set -1 to irq[0], so no need the warn.
+
+This reverts commit 2eac58d5026e4ec8b17ff8b62877fea9e1d2f1b3.
+
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
+Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/amba/bus.c | 3 ---
+ 1 file changed, 3 deletions(-)
+
+--- a/drivers/amba/bus.c
++++ b/drivers/amba/bus.c
+@@ -379,9 +379,6 @@ static int amba_device_try_add(struct am
+ void __iomem *tmp;
+ int i, ret;
+
+- WARN_ON(dev->irq[0] == (unsigned int)-1);
+- WARN_ON(dev->irq[1] == (unsigned int)-1);
+-
+ ret = request_resource(parent, &dev->res);
+ if (ret)
+ goto err_out;
--- /dev/null
+From 1131cadfd7563975f3a4efcc6f7c1fdc872db38b Mon Sep 17 00:00:00 2001
+From: Anson Jacob <Anson.Jacob@amd.com>
+Date: Tue, 24 Aug 2021 09:32:53 -0400
+Subject: drm/amd/display: Revert "Directly retrain link from debugfs"
+
+From: Anson Jacob <Anson.Jacob@amd.com>
+
+commit 1131cadfd7563975f3a4efcc6f7c1fdc872db38b upstream.
+
+This reverts commit f5b6a20c7ef40599095c796b0500d842ffdbc639.
+
+This patch broke new settings from taking effect. Hotplug is
+required for new settings to take effect.
+
+Reviewed-by: Mikita Lipski <mikita.lipski@amd.com>
+Acked-by: Mikita Lipski <mikita.lipski@amd.com>
+Signed-off-by: Anson Jacob <Anson.Jacob@amd.com>
+Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+@@ -247,6 +247,7 @@ static ssize_t dp_link_settings_write(st
+ {
+ struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
+ struct dc_link *link = connector->dc_link;
++ struct dc *dc = (struct dc *)link->dc;
+ struct dc_link_settings prefer_link_settings;
+ char *wr_buf = NULL;
+ const uint32_t wr_buf_size = 40;
+@@ -313,7 +314,7 @@ static ssize_t dp_link_settings_write(st
+ prefer_link_settings.lane_count = param[0];
+ prefer_link_settings.link_rate = param[1];
+
+- dp_retrain_link_dp_test(link, &prefer_link_settings, false);
++ dc_link_set_preferred_training_settings(dc, &prefer_link_settings, NULL, link, true);
+
+ kfree(wr_buf);
+ return size;
--- /dev/null
+From c8365dbda056578eebe164bf110816b1a39b4b7f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Thu, 30 Sep 2021 11:22:51 +0200
+Subject: drm/amdgpu: revert "Add autodump debugfs node for gpu reset v8"
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Christian König <christian.koenig@amd.com>
+
+commit c8365dbda056578eebe164bf110816b1a39b4b7f upstream.
+
+This reverts commit 728e7e0cd61899208e924472b9e641dbeb0775c4.
+
+Further discussion reveals that this feature is severely broken
+and needs to be reverted ASAP.
+
+GPU reset can never be delayed by userspace even for debugging or
+otherwise we can run into in kernel deadlocks.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Nirmoy Das <nirmoy.das@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2
+ drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 80 ----------------------------
+ drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h | 5 -
+ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 -
+ 4 files changed, 91 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+@@ -1073,8 +1073,6 @@ struct amdgpu_device {
+ char product_name[32];
+ char serial[20];
+
+- struct amdgpu_autodump autodump;
+-
+ atomic_t throttling_logging_enabled;
+ struct ratelimit_state throttling_logging_rs;
+ uint32_t ras_hw_enabled;
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+@@ -27,7 +27,6 @@
+ #include <linux/pci.h>
+ #include <linux/uaccess.h>
+ #include <linux/pm_runtime.h>
+-#include <linux/poll.h>
+
+ #include "amdgpu.h"
+ #include "amdgpu_pm.h"
+@@ -37,86 +36,8 @@
+ #include "amdgpu_securedisplay.h"
+ #include "amdgpu_fw_attestation.h"
+
+-int amdgpu_debugfs_wait_dump(struct amdgpu_device *adev)
+-{
+-#if defined(CONFIG_DEBUG_FS)
+- unsigned long timeout = 600 * HZ;
+- int ret;
+-
+- wake_up_interruptible(&adev->autodump.gpu_hang);
+-
+- ret = wait_for_completion_interruptible_timeout(&adev->autodump.dumping, timeout);
+- if (ret == 0) {
+- pr_err("autodump: timeout, move on to gpu recovery\n");
+- return -ETIMEDOUT;
+- }
+-#endif
+- return 0;
+-}
+-
+ #if defined(CONFIG_DEBUG_FS)
+
+-static int amdgpu_debugfs_autodump_open(struct inode *inode, struct file *file)
+-{
+- struct amdgpu_device *adev = inode->i_private;
+- int ret;
+-
+- file->private_data = adev;
+-
+- ret = down_read_killable(&adev->reset_sem);
+- if (ret)
+- return ret;
+-
+- if (adev->autodump.dumping.done) {
+- reinit_completion(&adev->autodump.dumping);
+- ret = 0;
+- } else {
+- ret = -EBUSY;
+- }
+-
+- up_read(&adev->reset_sem);
+-
+- return ret;
+-}
+-
+-static int amdgpu_debugfs_autodump_release(struct inode *inode, struct file *file)
+-{
+- struct amdgpu_device *adev = file->private_data;
+-
+- complete_all(&adev->autodump.dumping);
+- return 0;
+-}
+-
+-static unsigned int amdgpu_debugfs_autodump_poll(struct file *file, struct poll_table_struct *poll_table)
+-{
+- struct amdgpu_device *adev = file->private_data;
+-
+- poll_wait(file, &adev->autodump.gpu_hang, poll_table);
+-
+- if (amdgpu_in_reset(adev))
+- return POLLIN | POLLRDNORM | POLLWRNORM;
+-
+- return 0;
+-}
+-
+-static const struct file_operations autodump_debug_fops = {
+- .owner = THIS_MODULE,
+- .open = amdgpu_debugfs_autodump_open,
+- .poll = amdgpu_debugfs_autodump_poll,
+- .release = amdgpu_debugfs_autodump_release,
+-};
+-
+-static void amdgpu_debugfs_autodump_init(struct amdgpu_device *adev)
+-{
+- init_completion(&adev->autodump.dumping);
+- complete_all(&adev->autodump.dumping);
+- init_waitqueue_head(&adev->autodump.gpu_hang);
+-
+- debugfs_create_file("amdgpu_autodump", 0600,
+- adev_to_drm(adev)->primary->debugfs_root,
+- adev, &autodump_debug_fops);
+-}
+-
+ /**
+ * amdgpu_debugfs_process_reg_op - Handle MMIO register reads/writes
+ *
+@@ -1588,7 +1509,6 @@ int amdgpu_debugfs_init(struct amdgpu_de
+ }
+
+ amdgpu_ras_debugfs_create_all(adev);
+- amdgpu_debugfs_autodump_init(adev);
+ amdgpu_rap_debugfs_init(adev);
+ amdgpu_securedisplay_debugfs_init(adev);
+ amdgpu_fw_attestation_debugfs_init(adev);
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h
+@@ -26,10 +26,6 @@
+ /*
+ * Debugfs
+ */
+-struct amdgpu_autodump {
+- struct completion dumping;
+- struct wait_queue_head gpu_hang;
+-};
+
+ int amdgpu_debugfs_regs_init(struct amdgpu_device *adev);
+ int amdgpu_debugfs_init(struct amdgpu_device *adev);
+@@ -37,4 +33,3 @@ void amdgpu_debugfs_fini(struct amdgpu_d
+ void amdgpu_debugfs_fence_init(struct amdgpu_device *adev);
+ void amdgpu_debugfs_firmware_init(struct amdgpu_device *adev);
+ void amdgpu_debugfs_gem_init(struct amdgpu_device *adev);
+-int amdgpu_debugfs_wait_dump(struct amdgpu_device *adev);
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -4407,10 +4407,6 @@ int amdgpu_device_pre_asic_reset(struct
+ if (reset_context->reset_req_dev == adev)
+ job = reset_context->job;
+
+- /* no need to dump if device is not in good state during probe period */
+- if (!adev->gmc.xgmi.pending_reset)
+- amdgpu_debugfs_wait_dump(adev);
+-
+ if (amdgpu_sriov_vf(adev)) {
+ /* stop the data exchange thread */
+ amdgpu_virt_fini_data_exchange(adev);
--- /dev/null
+From ac653dd7996edf1770959e11a078312928bd7315 Mon Sep 17 00:00:00 2001
+From: Matthew Brost <matthew.brost@intel.com>
+Date: Thu, 9 Sep 2021 09:47:28 -0700
+Subject: Revert "drm/i915/gt: Propagate change in error status to children on unhold"
+
+From: Matthew Brost <matthew.brost@intel.com>
+
+commit ac653dd7996edf1770959e11a078312928bd7315 upstream.
+
+Propagating errors to dependent fences is broken and can lead to errors
+from one client ending up in another. In commit 3761baae908a ("Revert
+"drm/i915: Propagate errors on awaiting already signaled fences""), we
+attempted to get rid of fence error propagation but missed the case
+added in commit 8e9f84cf5cac ("drm/i915/gt: Propagate change in error
+status to children on unhold"). Revert that one too. This error was
+found by an up-and-coming selftest which triggers a reset during
+request cancellation and verifies that subsequent requests complete
+successfully.
+
+v2:
+ (Daniel Vetter)
+ - Use revert
+v3:
+ (Jason)
+ - Update commit message
+
+v4 (Daniele):
+ - fix checkpatch error in commit message.
+
+References: '3761baae908a ("Revert "drm/i915: Propagate errors on awaiting already signaled fences"")'
+Signed-off-by: Matthew Brost <matthew.brost@intel.com>
+Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210909164744.31249-8-matthew.brost@intel.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
++++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+@@ -2091,10 +2091,6 @@ static void __execlists_unhold(struct i9
+ if (p->flags & I915_DEPENDENCY_WEAK)
+ continue;
+
+- /* Propagate any change in error status */
+- if (rq->fence.error)
+- i915_request_set_error_once(w, rq->fence.error);
+-
+ if (w->engine != rq->engine)
+ continue;
+
--- /dev/null
+From 0398adaec3419bdfa93baae70a3b696b4abdd7ad Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 8 Oct 2021 22:59:36 +0200
+Subject: Revert "dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon"
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Rafał Miłecki <rafal@milecki.pl>
+
+commit 0398adaec3419bdfa93baae70a3b696b4abdd7ad upstream.
+
+This reverts commit 2ae80900f239484069569380e1fc4340fd6e0089.
+
+My rework was unneeded & wrong. It replaced a clear & correct "reg"
+property usage with a custom "offset" one.
+
+Back then I didn't understand how to properly handle CRU block binding.
+I heard / read about syscon and tried to use it in a totally invalid
+way. That change also missed Rob's review (obviously).
+
+Northstar's pin controller is a simple consistent hardware block that
+can be cleanly mapped using a 0x24 long reg space.
+
+Since the rework commit there wasn't any follow up modifying in-kernel
+DTS files to use the new binding. Broadcom also isn't known to use that
+bugged binding. There is close to zero chance this revert may actually
+cause problems / regressions.
+
+This commit is a simple revert. Example binding may (should) be updated
+/ cleaned up but that can be handled separately.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Link: https://lore.kernel.org/r/20211008205938.29925-1-zajec5@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ .../devicetree/bindings/mfd/brcm,cru.yaml | 11 +++++----
+ .../bindings/pinctrl/brcm,ns-pinmux.yaml | 23 +++++++++++--------
+ 2 files changed, 19 insertions(+), 15 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
+index fc1317ab3226..28ac60acf4ac 100644
+--- a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
++++ b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
+@@ -32,13 +32,13 @@ properties:
+ "#size-cells":
+ const: 1
+
+- pinctrl:
+- $ref: ../pinctrl/brcm,ns-pinmux.yaml
+-
+ patternProperties:
+ '^clock-controller@[a-f0-9]+$':
+ $ref: ../clock/brcm,iproc-clocks.yaml
+
++ '^pin-controller@[a-f0-9]+$':
++ $ref: ../pinctrl/brcm,ns-pinmux.yaml
++
+ '^thermal@[a-f0-9]+$':
+ $ref: ../thermal/brcm,ns-thermal.yaml
+
+@@ -73,9 +73,10 @@ examples:
+ "iprocfast", "sata1", "sata2";
+ };
+
+- pinctrl {
++ pin-controller@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+- offset = <0x1c0>;
++ reg = <0x1c0 0x24>;
++ reg-names = "cru_gpio_control";
+ };
+
+ thermal@2c0 {
+diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml
+index 470aff599c27..78600a8fe403 100644
+--- a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml
+@@ -17,9 +17,6 @@ description:
+
+ A list of pins varies across chipsets so few bindings are available.
+
+- Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"
+- node.
+-
+ properties:
+ compatible:
+ enum:
+@@ -27,10 +24,11 @@ properties:
+ - brcm,bcm4709-pinmux
+ - brcm,bcm53012-pinmux
+
+- offset:
+- description: offset of pin registers in the CRU block
++ reg:
+ maxItems: 1
+- $ref: /schemas/types.yaml#/definitions/uint32-array
++
++ reg-names:
++ const: cru_gpio_control
+
+ patternProperties:
+ '-pins$':
+@@ -72,19 +70,24 @@ allOf:
+ uart1_grp ]
+
+ required:
+- - offset
++ - reg
++ - reg-names
+
+ additionalProperties: false
+
+ examples:
+ - |
+ cru@1800c100 {
+- compatible = "syscon", "simple-mfd";
++ compatible = "simple-bus";
+ reg = <0x1800c100 0x1a4>;
++ ranges;
++ #address-cells = <1>;
++ #size-cells = <1>;
+
+- pinctrl {
++ pin-controller@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+- offset = <0xc0>;
++ reg = <0x1c0 0x24>;
++ reg-names = "cru_gpio_control";
+
+ spi-pins {
+ function = "spi";
+--
+2.33.1
+
--- /dev/null
+From 2b2f106eb55276a60a89ac27a52d0d738b57a546 Mon Sep 17 00:00:00 2001
+From: Lucas Stach <l.stach@pengutronix.de>
+Date: Sat, 2 Oct 2021 02:59:37 +0200
+Subject: Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
+
+From: Lucas Stach <l.stach@pengutronix.de>
+
+commit 2b2f106eb55276a60a89ac27a52d0d738b57a546 upstream.
+
+This reverts commit a77ebdd9f553. It turns out that the VPU domain has no
+different requirements, even though the downstream ATF implementation seems
+to suggest otherwise. Powering on the domain with the reset asserted works
+fine. As the changed sequence has caused sporadic issues with the GPU
+domains, just revert the change to go back to the working sequence.
+
+Cc: <stable@vger.kernel.org> # 5.14
+Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
+Acked-by: Peng Fan <peng.fan@nxp.com>
+Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/soc/imx/gpcv2.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/soc/imx/gpcv2.c
++++ b/drivers/soc/imx/gpcv2.c
+@@ -244,6 +244,8 @@ static int imx_pgc_power_up(struct gener
+ goto out_regulator_disable;
+ }
+
++ reset_control_assert(domain->reset);
++
+ if (domain->bits.pxx) {
+ /* request the domain to power up */
+ regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
+@@ -266,8 +268,6 @@ static int imx_pgc_power_up(struct gener
+ GPC_PGC_CTRL_PCR);
+ }
+
+- reset_control_assert(domain->reset);
+-
+ /* delay for reset to propagate */
+ udelay(5);
+
--- /dev/null
+From 285bb1738e196507bf985574d0bc1e9dd72d46b1 Mon Sep 17 00:00:00 2001
+From: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
+Date: Fri, 22 Oct 2021 15:04:47 +0100
+Subject: Revert "wcn36xx: Disable bmps when encryption is disabled"
+
+From: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
+
+commit 285bb1738e196507bf985574d0bc1e9dd72d46b1 upstream.
+
+This reverts commit c6522a5076e1a65877c51cfee313a74ef61cabf8.
+
+Testing on tip-of-tree shows that this is working now. Revert this and
+re-enable BMPS for Open APs.
+
+Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+Link: https://lore.kernel.org/r/20211022140447.2846248-3-bryan.odonoghue@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/net/wireless/ath/wcn36xx/main.c | 10 ----------
+ drivers/net/wireless/ath/wcn36xx/pmc.c | 5 +----
+ drivers/net/wireless/ath/wcn36xx/wcn36xx.h | 1 -
+ 3 files changed, 1 insertion(+), 15 deletions(-)
+
+--- a/drivers/net/wireless/ath/wcn36xx/main.c
++++ b/drivers/net/wireless/ath/wcn36xx/main.c
+@@ -604,15 +604,6 @@ static int wcn36xx_set_key(struct ieee80
+ }
+ }
+ }
+- /* FIXME: Only enable bmps support when encryption is enabled.
+- * For any reasons, when connected to open/no-security BSS,
+- * the wcn36xx controller in bmps mode does not forward
+- * 'wake-up' beacons despite AP sends DTIM with station AID.
+- * It could be due to a firmware issue or to the way driver
+- * configure the station.
+- */
+- if (vif->type == NL80211_IFTYPE_STATION)
+- vif_priv->allow_bmps = true;
+ break;
+ case DISABLE_KEY:
+ if (!(IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags)) {
+@@ -913,7 +904,6 @@ static void wcn36xx_bss_info_changed(str
+ vif->addr,
+ bss_conf->aid);
+ vif_priv->sta_assoc = false;
+- vif_priv->allow_bmps = false;
+ wcn36xx_smd_set_link_st(wcn,
+ bss_conf->bssid,
+ vif->addr,
+--- a/drivers/net/wireless/ath/wcn36xx/pmc.c
++++ b/drivers/net/wireless/ath/wcn36xx/pmc.c
+@@ -23,10 +23,7 @@ int wcn36xx_pmc_enter_bmps_state(struct
+ {
+ int ret = 0;
+ struct wcn36xx_vif *vif_priv = wcn36xx_vif_to_priv(vif);
+-
+- if (!vif_priv->allow_bmps)
+- return -ENOTSUPP;
+-
++ /* TODO: Make sure the TX chain clean */
+ ret = wcn36xx_smd_enter_bmps(wcn, vif);
+ if (!ret) {
+ wcn36xx_dbg(WCN36XX_DBG_PMC, "Entered BMPS\n");
+--- a/drivers/net/wireless/ath/wcn36xx/wcn36xx.h
++++ b/drivers/net/wireless/ath/wcn36xx/wcn36xx.h
+@@ -128,7 +128,6 @@ struct wcn36xx_vif {
+ enum wcn36xx_hal_bss_type bss_type;
+
+ /* Power management */
+- bool allow_bmps;
+ enum wcn36xx_power_state pw_state;
+
+ u8 bss_index;
revert-usb-core-hcd-add-support-for-deferring-roothub.patch
drm-amdkfd-fix-boot-failure-when-iommu-is-disabled-in-picasso.patch
drm-i915-remove-memory-frequency-calculation.patch
+revert-soc-imx-gpcv2-move-reset-assert-after-requesting-domain-power-up.patch
+arm-9120-1-revert-amba-make-use-of-1-irqs-warn.patch
+revert-wcn36xx-disable-bmps-when-encryption-is-disabled.patch
+drm-amdgpu-revert-add-autodump-debugfs-node-for-gpu-reset-v8.patch
+drm-amd-display-revert-directly-retrain-link-from-debugfs.patch
+revert-drm-i915-gt-propagate-change-in-error-status-to-children-on-unhold.patch
+revert-dt-bindings-pinctrl-bcm4708-pinmux-rework-binding-to-use-syscon.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
