ARM: dts: bcm63148: Add I2C block

The BCM63148 has a brcmper I2C block.

The peripheral range needs to be extended to accommodate
it. The Boot LUT is at offset + 0x10000 so extend it to
cover at least that too, 128 KB.

INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115,
convert back to SPI IRQ 115-32 = 83.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-7-5373ef82c50c@kernel.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
index e071cddb28fc2888b8f408b4bc275290dd135642..b2ddc2f583e1aed306caf5b8bf11b5a83283386f 100644 (file)
--- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
@@ -97,7 +97,7 @@
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
-               ranges = <0 0xfffe8000 0x8000>;
+               ranges = <0 0xfffe8000 0x20000>;
 
                /* GPIOs 0 .. 31 */
                gpio0: gpio@100 {
@@ -197,5 +197,14 @@
                                reg = <0>;
                        };
                };
+
+               i2c0: i2c@3e00 {
+                       compatible = "brcm,brcmper-i2c";
+                       reg = <0x3e00 0x60>;
+                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
        };
 };