]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: sm8150: fix number of pins in 'gpio-ranges'
authorShawn Guo <shawn.guo@linaro.org>
Wed, 3 Mar 2021 03:31:04 +0000 (11:31 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 14 May 2021 07:50:10 +0000 (09:50 +0200)
[ Upstream commit de3abdf3d15c6e7f456e2de3f9da78f3a31414cc ]

The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: e13c6d144fa0 ("arm64: dts: qcom: sm8150: Add base dts file")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-3-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/qcom/sm8150.dtsi

index f0a872e02686d7dcb331d6c4eda43b1d25490d50..1aec54590a11aba8170d7293680f374521a837b7 100644 (file)
                              <0x0 0x03D00000 0x0 0x300000>;
                        reg-names = "west", "east", "north", "south";
                        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
-                       gpio-ranges = <&tlmm 0 0 175>;
+                       gpio-ranges = <&tlmm 0 0 176>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;