arm64: dts: qcom: sm8550: Fix xo clock supply of platform SD host controller

The expected frequency of SD host controller core supply clock is 19.2MHz,
while RPMH_CXO_CLK clock frequency on SM8650 platform is 38.4MHz.

Apparently the overclocked supply clock could be good enough on some
boards and even with the most of SD cards, however some low-end UHS-I
SD cards in SDR104 mode of the host controller produce I/O errors in
runtime, fortunately this problem is gone, if the "xo" clock frequency
matches the expected 19.2MHz clock rate.

Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20260314023715.357512-2-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 109bf567a8a8e539e2390f20199f94a5c850a3c3..be0f7e0f4d2cccd6cb4746f7296c9bb7fa3fb97c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3234,7 +3234,7 @@
 
                        clocks = <&gcc GCC_SDCC2_AHB_CLK>,
                                 <&gcc GCC_SDCC2_APPS_CLK>,
-                                <&rpmhcc RPMH_CXO_CLK>;
+                                <&bi_tcxo_div2>;
                        clock-names = "iface", "core", "xo";
                        iommus = <&apps_smmu 0x540 0>;
                        qcom,dll-config = <0x0007642c>;