arm64: dts: freescale: add pixpaper display overlay for i.MX93 FRDM

Add device tree overlay to support the MayQueen PixPaper e-paper display
on the NXP i.MX93 FRDM board. The display is connected via LPSPI3
interface and uses GPIO pins for reset, busy and DC control.

The overlay configures:
    - LPSPI3 pinmux for SPI communication (MOSI, MISO, CLK, CE0)
    - PixPaper display device with proper GPIO assignments
    - SPI frequency set to 1MHz for stable operation

Enable Open-EP Community pixpaper-213-c support on NXP i.MX93.

Signed-off-by: Wig Cheng <onlywig@gmail.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index e0738525d37ef0a7fc5e5f358c8887e3c63e18f5..0bea667e7e4728110821e12c106fd48c92fadf25 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -420,6 +420,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb-i3c.dtb
 
 dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-frdm.dtb
+
+imx93-11x11-frdm-pixpaper-dtbs += imx93-11x11-frdm.dtb imx93-11x11-frdm-pixpaper.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-frdm-pixpaper.dtb
+
 dtb-$(CONFIG_ARCH_MXC) += imx93-14x14-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-kontron-bl-osm-s.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-nash.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso
new file mode 100644 (file)
index 0000000..d220d7e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Overlay for Mayqueen (Open-EP Community) pixpaper display
+ * support on NXP FRDM i.MX 93 Development Board
+ *
+ * Copyright (C) 2026 Wig Cheng <onlywig@gmail.com>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "imx93-pinfunc.h"
+
+/dts-v1/;
+/plugin/;
+
+&iomuxc {
+       pinctrl_epd_ctrl: epdctrlgrp {
+               fsl,pins = <
+                       MX93_PAD_GPIO_IO05__GPIO2_IO05          0x31e /* DC pin */
+                       MX93_PAD_GPIO_IO06__GPIO2_IO06          0x31e /* RESET pin */
+                       MX93_PAD_GPIO_IO26__GPIO2_IO26          0x31e /* BUSY pin */
+               >;
+       };
+
+       pinctrl_lpspi3: lpspi3grp {
+               fsl,pins = <
+                       MX93_PAD_GPIO_IO08__GPIO2_IO08          0x3fe /* SPI3 CE0 */
+                       MX93_PAD_GPIO_IO09__LPSPI3_SIN          0x3fe /* SPI3 MISO */
+                       MX93_PAD_GPIO_IO10__LPSPI3_SOUT         0x3fe /* SPI3 MOSI */
+                       MX93_PAD_GPIO_IO11__LPSPI3_SCK          0x3fe /* SPI3 CLK */
+               >;
+       };
+};
+
+&lpspi3 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       cs-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pinctrl_lpspi3>, <&pinctrl_epd_ctrl>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       display@0 {
+               compatible = "mayqueen,pixpaper";
+               reg = <0>;
+               busy-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+               dc-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+               spi-max-frequency = <1000000>;
+       };
+};