LoongArch: Simplify vec_widen_<su>{add/sub/mult}_{hi/lo}_m describe.

gcc/ChangeLog:

	* config/loongarch/lasx.md (vec_widen_<su>add_hi_<mode>):
	Move.
	(vec_widen_<su>add_lo_<mode>): Move.
	(vec_widen_<su>sub_hi_<mode>): Move.
	(vec_widen_<su>sub_lo_<mode>): Move.
	(vec_widen_<su>mult_hi_<mode>): Move.
	(vec_widen_<su>mult_lo_<mode>): Move.
	(hi_lo): New define_int_attr.
	(vec_widen_<su><optab>_<hi_lo>_<mode>): New define_expand.
	(vec_widen_<su>mult_<hi_lo>_<mode>): Likewise.
	* config/loongarch/loongarch-protos.h
	(loongarch_expand_vec_widen_hilo): Modify the function
	parameter list.
	* config/loongarch/loongarch.cc
	(loongarch_expand_vec_widen_hilo): Optimized.

diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
index c4186b0a779c5910c33f796acec62718e6099e27..ef67eb3915dcf59965733a7e688df04be9f07900 100644 (file)
--- a/gcc/config/loongarch/lasx.md
+++ b/gcc/config/loongarch/lasx.md
@@ -3570,69 +3570,40 @@
   [(set_attr "type" "simd_store")
    (set_attr "mode" "DI")])
 
-(define_expand "vec_widen_<su>add_hi_<mode>"
-  [(match_operand:<VDMODE256> 0 "register_operand")
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 1 "register_operand"))
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 2 "register_operand"))]
-  "ISA_HAS_LASX"
-{
-  loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2],
-                        <u_bool>, true, "add");
-  DONE;
-})
-
-(define_expand "vec_widen_<su>add_lo_<mode>"
-  [(match_operand:<VDMODE256> 0 "register_operand")
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 1 "register_operand"))
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 2 "register_operand"))]
-  "ISA_HAS_LASX"
-{
-  loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2],
-                        <u_bool>, false, "add");
-  DONE;
-})
-
-(define_expand "vec_widen_<su>sub_hi_<mode>"
-  [(match_operand:<VDMODE256> 0 "register_operand")
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 1 "register_operand"))
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 2 "register_operand"))]
-  "ISA_HAS_LASX"
-{
-  loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2],
-                        <u_bool>, true, "sub");
-  DONE;
-})
-
-(define_expand "vec_widen_<su>sub_lo_<mode>"
-  [(match_operand:<VDMODE256> 0 "register_operand")
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 1 "register_operand"))
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 2 "register_operand"))]
-  "ISA_HAS_LASX"
-{
-  loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2],
-                        <u_bool>, false, "sub");
-  DONE;
-})
+(define_int_attr hi_lo [(0 "lo") (1 "hi")])
 
-(define_expand "vec_widen_<su>mult_hi_<mode>"
+(define_expand "vec_widen_<su><optab>_<hi_lo>_<mode>"
   [(match_operand:<VDMODE256> 0 "register_operand")
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 1 "register_operand"))
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 2 "register_operand"))]
+   (match_operand:ILASX_HB 1 "register_operand")
+   (match_operand:ILASX_HB 2 "register_operand")
+   (any_extend (const_int 0))
+   (addsub (const_int 0) (const_int 0))
+   (const_int zero_one)]
   "ISA_HAS_LASX"
 {
+  rtx (*fn_even) (rtx, rtx, rtx) =
+gen_lasx_xv<optab>wev_<dlasxfmt>_<lasxfmt><u>;
+  rtx (*fn_odd) (rtx, rtx, rtx) =
+gen_lasx_xv<optab>wod_<dlasxfmt>_<lasxfmt><u>;
   loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2],
-                        <u_bool>, true, "mult");
+                        <zero_one>, fn_even, fn_odd);
   DONE;
 })
 
-(define_expand "vec_widen_<su>mult_lo_<mode>"
+(define_expand "vec_widen_<su>mult_<hi_lo>_<mode>"
   [(match_operand:<VDMODE256> 0 "register_operand")
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 1 "register_operand"))
-   (any_extend:<VDMODE256> (match_operand:ILASX_HB 2 "register_operand"))]
+   (match_operand:ILASX_HB 1 "register_operand")
+   (match_operand:ILASX_HB 2 "register_operand")
+   (any_extend (const_int 0))
+   (const_int zero_one)]
   "ISA_HAS_LASX"
 {
+  rtx (*fn_even) (rtx, rtx, rtx) =
+gen_lasx_xvmulwev_<dlasxfmt>_<lasxfmt><u>;
+  rtx (*fn_odd) (rtx, rtx, rtx) =
+gen_lasx_xvmulwod_<dlasxfmt>_<lasxfmt><u>;
   loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2],
-                        <u_bool>, false, "mult");
+                        <zero_one>, fn_even, fn_odd);
   DONE;
 })
 

diff --git a/gcc/config/loongarch/loongarch-protos.h b/gcc/config/loongarch/loongarch-protos.h
index 6ecbe27218ca4105913a64c9de6fd6da02f777b3..bec436845aa16b904145a4eefd0f67947aaac47d 100644 (file)
--- a/gcc/config/loongarch/loongarch-protos.h
+++ b/gcc/config/loongarch/loongarch-protos.h
@@ -198,7 +198,8 @@ extern void loongarch_register_frame_header_opt (void);
 extern void loongarch_expand_vec_cond_expr (machine_mode, machine_mode, rtx *);
 extern void loongarch_expand_vec_cond_mask_expr (machine_mode, machine_mode,
                                                 rtx *);
-extern void loongarch_expand_vec_widen_hilo (rtx, rtx, rtx, bool, bool, const char *);
+extern void loongarch_expand_vec_widen_hilo (rtx, rtx, rtx, bool,
+       rtx (*)(rtx, rtx, rtx), rtx (*)(rtx, rtx, rtx));
 
 /* Routines implemented in loongarch-c.c.  */
 void loongarch_cpu_cpp_builtins (cpp_reader *);
@@ -217,7 +218,8 @@ extern void loongarch_emit_swdivsf (rtx, rtx, rtx, machine_mode);
 extern bool loongarch_explicit_relocs_p (enum loongarch_symbol_type);
 extern bool loongarch_symbol_extreme_p (enum loongarch_symbol_type);
 extern bool loongarch_option_valid_attribute_p (tree, tree, tree, int);
-extern void loongarch_option_override_internal (struct loongarch_target *, struct gcc_options *, struct gcc_options *);
+extern void loongarch_option_override_internal (struct loongarch_target *,
+       struct gcc_options *, struct gcc_options *);
 extern void loongarch_reset_previous_fndecl (void);
 extern void loongarch_save_restore_target_globals (tree new_tree);
 extern void loongarch_register_pragmas (void);

diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index 740c8611a71ac75e595bf28d5ac93855564f781b..2198946facfe2d1226cbf8ee53b7b5def1231d0a 100644 (file)
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -8903,98 +8903,22 @@ loongarch_expand_vec_interleave (rtx target, rtx op0, rtx op1, bool high_p)
 
 void
 loongarch_expand_vec_widen_hilo (rtx dest, rtx op1, rtx op2,
-                                bool uns_p, bool high_p, const char *optab)
+                                bool high_p, rtx (*fn_even) (rtx, rtx, rtx),
+                                rtx (*fn_odd) (rtx, rtx, rtx))
 {
   machine_mode wmode = GET_MODE (dest);
   machine_mode mode = GET_MODE (op1);
-  rtx t1, t2, t3;
+  rtx t1 = gen_reg_rtx (wmode);
+  rtx t2 = gen_reg_rtx (wmode);
+  rtx t3 = gen_reg_rtx (wmode);
 
-  t1 = gen_reg_rtx (wmode);
-  t2 = gen_reg_rtx (wmode);
-  t3 = gen_reg_rtx (wmode);
   switch (mode)
     {
     case V16HImode:
-      if (!strcmp (optab, "add"))
-       {
-         if (!uns_p)
-           {
-             emit_insn (gen_lasx_xvaddwev_w_h (t1, op1, op2));
-             emit_insn (gen_lasx_xvaddwod_w_h (t2, op1, op2));
-           }
-         else
-           {
-             emit_insn (gen_lasx_xvaddwev_w_hu (t1, op1, op2));
-             emit_insn (gen_lasx_xvaddwod_w_hu (t2, op1, op2));
-           }
-       }
-      else if (!strcmp (optab, "mult"))
-       {
-         if (!uns_p)
-           {
-             emit_insn (gen_lasx_xvmulwev_w_h (t1, op1, op2));
-             emit_insn (gen_lasx_xvmulwod_w_h (t2, op1, op2));
-           }
-         else
-           {
-             emit_insn (gen_lasx_xvmulwev_w_hu (t1, op1, op2));
-             emit_insn (gen_lasx_xvmulwod_w_hu (t2, op1, op2));
-           }
-       }
-      else if (!strcmp (optab, "sub"))
-       {
-         if (!uns_p)
-           {
-             emit_insn (gen_lasx_xvsubwev_w_h (t1, op1, op2));
-             emit_insn (gen_lasx_xvsubwod_w_h (t2, op1, op2));
-           }
-         else
-           {
-             emit_insn (gen_lasx_xvsubwev_w_hu (t1, op1, op2));
-             emit_insn (gen_lasx_xvsubwod_w_hu (t2, op1, op2));
-           }
-       }
-      break;
-
     case V32QImode:
-      if (!strcmp (optab, "add"))
        {
-         if (!uns_p)
-           {
-             emit_insn (gen_lasx_xvaddwev_h_b (t1, op1, op2));
-             emit_insn (gen_lasx_xvaddwod_h_b (t2, op1, op2));
-           }
-         else
-           {
-             emit_insn (gen_lasx_xvaddwev_h_bu (t1, op1, op2));
-             emit_insn (gen_lasx_xvaddwod_h_bu (t2, op1, op2));
-           }
-       }
-      else if (!strcmp (optab, "mult"))
-       {
-         if (!uns_p)
-           {
-             emit_insn (gen_lasx_xvmulwev_h_b (t1, op1, op2));
-             emit_insn (gen_lasx_xvmulwod_h_b (t2, op1, op2));
-           }
-         else
-           {
-             emit_insn (gen_lasx_xvmulwev_h_bu (t1, op1, op2));
-             emit_insn (gen_lasx_xvmulwod_h_bu (t2, op1, op2));
-           }
-       }
-      else if (!strcmp (optab, "sub"))
-       {
-         if (!uns_p)
-           {
-             emit_insn (gen_lasx_xvsubwev_h_b (t1, op1, op2));
-             emit_insn (gen_lasx_xvsubwod_h_b (t2, op1, op2));
-           }
-         else
-           {
-             emit_insn (gen_lasx_xvsubwev_h_bu (t1, op1, op2));
-             emit_insn (gen_lasx_xvsubwod_h_bu (t2, op1, op2));
-           }
+         emit_insn (fn_even (t1, op1, op2));
+         emit_insn (fn_odd (t2, op1, op2));
        }
       break;