target can be especially at -O0 a MEM, not just a REG, and most of the
ix86_expand_builtin spots which use target and can't support MEM
destinations deal with it properly, except these 3 spots don't.
Fixed thusly, when we change target to a new pseudo, the caller will
take care of storing that pseudo into the MEM, and this is the
solution other spots with similar requirements use in the function.
2025-12-20 Jakub Jelinek <jakub@redhat.com>
PR target/123217
* config/i386/i386-expand.cc (ix86_expand_builtin)
<case IX86_BUILTIN_ENCODEKEY128U32, case IX86_BUILTIN_ENCODEKEY256U32,
case IX86_BUILTIN_URDMSR>: Set target to a new pseudo even if it is
non-NULL but doesn't satisfy register_operand predicate.
* gcc.target/i386/keylocker-pr123217.c: New test.
* gcc.target/i386/user_msr-pr123217.c: New test.
for (i = 0; i < 3; i++)
xmm_regs[i] = gen_rtx_REG (V2DImode, GET_SSE_REGNO (i));
- if (target == 0)
+ if (target == 0 || !register_operand (target, SImode))
target = gen_reg_rtx (SImode);
emit_insn (gen_encodekey128u32 (target, op0));
for (i = 0; i < 4; i++)
xmm_regs[i] = gen_rtx_REG (V2DImode, GET_SSE_REGNO (i));
- if (target == 0)
+ if (target == 0 || !register_operand (target, SImode))
target = gen_reg_rtx (SImode);
emit_insn (gen_encodekey256u32 (target, op0));
}
else
{
- if (target == 0)
+ if (target == 0 || !register_operand (target, DImode))
target = gen_reg_rtx (DImode);
icode = CODE_FOR_urdmsr;
op1 = op0;
--- /dev/null
+/* PR target/123217 */
+/* { dg-do compile } */
+/* { dg-options "-mkl -O0" } */
+
+__attribute__((__vector_size__(16))) long long v, w;
+
+unsigned
+foo (void *p, void *q)
+{
+ unsigned x = __builtin_ia32_encodekey128_u32 (0U, v, p);
+ unsigned y = __builtin_ia32_encodekey256_u32 (0U, v, w, q);
+ return x + y;
+}
--- /dev/null
+/* PR target/123217 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-musermsr -O0" } */
+
+unsigned long long
+foo (unsigned long long x)
+{
+ unsigned long long y = __builtin_ia32_urdmsr (x);
+ return y;
+}