]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: rockchip: drop rockchip,trcm-sync-tx-only from rk3588 i2s
authorHeiko Stuebner <heiko.stuebner@cherry.de>
Tue, 27 Feb 2024 16:46:56 +0000 (17:46 +0100)
committerSasha Levin <sashal@kernel.org>
Tue, 26 Mar 2024 22:16:51 +0000 (18:16 -0400)
[ Upstream commit a8037ceb89649659831e86a87a9329d1bb43c735 ]

The rockchip,trcm-sync-tx-only property is at this time only documented
for the tdm variant of Rockchip i2s controllers.

While there was a series [0] adding code and binding for the property,
it doesn't seem to have gone forward back in 2021.

So for now fix the devicetree check by removing the property from rk3588
i2s controllers until support for it gets merged.

[0] https://patchwork.kernel.org/project/linux-rockchip/patch/1629796734-4243-5-git-send-email-sugar.zhang@rock-chips.com/

Fixes: 8ae112a5554f ("arm64: dts: rockchip: Add rk3588s I2S nodes")
Cc: Sugar Zhang <sugar.zhang@rock-chips.com>
Cc: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240227164659.705271-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/rockchip/rk3588s.dtsi

index 36b1b7acfe6a15042600a595875054744d48f257..82350ddb262f2fe3285b16439550d5c5d7c9fffe 100644 (file)
                dmas = <&dmac1 0>, <&dmac1 1>;
                dma-names = "tx", "rx";
                power-domains = <&power RK3588_PD_AUDIO>;
-               rockchip,trcm-sync-tx-only;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s2m1_lrck
                             &i2s2m1_sclk
                dmas = <&dmac1 2>, <&dmac1 3>;
                dma-names = "tx", "rx";
                power-domains = <&power RK3588_PD_AUDIO>;
-               rockchip,trcm-sync-tx-only;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s3_lrck
                             &i2s3_sclk