* (C) Copyright 2008
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
*
- * And thoroughly mangled into dragonfire form, probably never to escape Xilinx.
- *
* See file CREDITS for list of people who contributed to this
* project.
*
/* Clear prescaler control bits */
val &= ~XSCUTIMER_CONTROL_PRESCALER_MASK;
/* Set prescaler value */
- val |= (0xFF << XSCUTIMER_CONTROL_PRESCALER_SHIFT);
+ val |= (CONFIG_TIMER_PRESCALE << XSCUTIMER_CONTROL_PRESCALER_SHIFT);
/* Enable the decrementer */
val |= XSCUTIMER_CONTROL_ENABLE_MASK;
XScuTimer_WriteReg(XSCUTIMER_CONTROL_OFFSET, val);
*/
ulong get_tbclk(void)
{
- /* We overrun in 100s */
- return (ulong)(TIMER_LOAD_VAL / 100);
+ return (ulong)CONFIG_SYS_HZ;
}
void reset_timer_masked(void)
ulong get_timer_masked(void)
{
unsigned long long res = get_ticks();
- do_div (res, (CONFIG_SYS_HZ / 1000000) );
return res;
}
void set_timer(ulong t)
{
- timestamp = t * (TIMER_LOAD_VAL / (100 * CONFIG_SYS_HZ));
+ timestamp = t;
}
void __udelay(unsigned long usec)
unsigned long long tmp;
ulong tmo;
- tmo = (usec + 9) / 10;
+ tmo = usec / (1000000 / CONFIG_SYS_HZ);
tmp = get_ticks() + tmo; /* get current timestamp */
- while (get_ticks() < tmp)/* loop till event */
+ while (get_ticks() < tmp) { /* loop till event */
/*NOP*/;
+ }
}
+
#define CONFIG_TTC0 1
#define CONFIG_GEM0 1
-/* XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ */
-#define CONFIG_SYS_HZ 10000000
+#define TIMER_CLOCK 5000000
+#define CONFIG_TIMER_PRESCALE 255
+#define CONFIG_SYS_HZ (TIMER_CLOCK / CONFIG_TIMER_PRESCALE)
/* And here... */
#define CONFIG_SYS_LOAD_ADDR 0 /* default? */