arm64: dts: ti: k3-am62p-j722s-common-main: Add CSI2 interrupts property

Add interrupts property for CDNS CSI2RX. Interrupt IDs are taken from the
J722S TRM [0].

Interrupt Line     | Source Interrupt
-------------------|-------------------------
GICSS0_SPI_IN_175  | CSI_RX_IF0_CSI_ERR_IRQ_0
GICSS0_SPI_IN_173  | CSI_RX_IF0_CSI_IRQ_0

[0]: https://www.ti.com/lit/zip/sprujb3

Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20250808095804.544298-5-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index 2e5e25a8ca868d535a236f4bf3738d802d42d395..4427b12058a678bf73ddf28da4de9872046d206b 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -1045,6 +1045,9 @@
                cdns_csi2rx0: csi-bridge@30101000 {
                        compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
                        reg = <0x00 0x30101000 0x00 0x1000>;
+                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error_irq", "irq";
                        clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
                                <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
                        clock-names = "sys_clk", "p_clk", "pixel_if0_clk",