Xilinx: ARM: Update DDR initialization to PEEP11.

diff --git a/board/xilinx/dfe/lowlevel_init.S b/board/xilinx/dfe/lowlevel_init.S
index 7ea594c0b3ed0a8858bb2b41805d26370b2dc1ea..72c245bf95df2f1c732ad2b2ffc4c6e958478591 100755 (executable)
--- a/board/xilinx/dfe/lowlevel_init.S
+++ b/board/xilinx/dfe/lowlevel_init.S
@@ -137,7 +137,7 @@ doit:
        str r2, [r1]
 
        ldr r1, =(XPSS_DDR_CTRL_BASEADDR + 0x44)
-       ldr r2, =0x0FF33333
+       ldr r2, =0x0FF66666
        str r2, [r1]
 #endif