Replace some 4-space indents with 3-space indents. Merged from DARWIN.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@9009

diff --git a/cachegrind/cg-x86.c b/cachegrind/cg-x86.c
index 76e24d7c90257778436bcfb4567f9a39ec749a91..873c351537380d2239083a836a5b4ea9de5fd84f 100644 (file)
--- a/cachegrind/cg-x86.c
+++ b/cachegrind/cg-x86.c
@@ -42,12 +42,12 @@
 
 static void micro_ops_warn(Int actual_size, Int used_size, Int line_size)
 {
-    VG_(message)(Vg_DebugMsg, 
-       "warning: Pentium 4 with %d KB micro-op instruction trace cache", 
-       actual_size);
-    VG_(message)(Vg_DebugMsg, 
-       "         Simulating a %d KB I-cache with %d B lines", 
-       used_size, line_size);
+   VG_(message)(Vg_DebugMsg, 
+      "warning: Pentium 4 with %d KB micro-op instruction trace cache", 
+      actual_size);
+   VG_(message)(Vg_DebugMsg, 
+      "         Simulating a %d KB I-cache with %d B lines", 
+      used_size, line_size);
 }
 
 /* Intel method is truly wretched.  We have to do an insane indexing into an

diff --git a/cachegrind/cg_arch.h b/cachegrind/cg_arch.h
index f771d34656620e4154b9d4eac71f3976ea645e4f..dfa135dc917c696e18846a7752dd40049ca643e5 100644 (file)
--- a/cachegrind/cg_arch.h
+++ b/cachegrind/cg_arch.h
@@ -33,9 +33,9 @@
 
 // For cache simulation
 typedef struct {
-    int size;       // bytes
-    int assoc;
-    int line_size;  // bytes
+   int size;       // bytes
+   int assoc;
+   int line_size;  // bytes
 } cache_t;
 
 // Gives the configuration of I1, D1 and L2 caches.  They get overridden