zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
- zynqmp-ep108.dtb
+ zynqmp-ep108.dtb \
+ zynqmp-zcu102.dtb \
+ zynqmp-zcu102-revB.dtb \
+ zynqmp-zc1751-xm015-dc1.dtb \
+ zynqmp-zc1751-xm016-dc2.dtb \
+ zynqmp-zc1751-xm019-dc5.dtb \
+ zynqmp-mini-qspi.dtb \
+ zynqmp-mini-nand.dtb
dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-evm.dtb
dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb
+ dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
}
#endif
-
+#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
+/*
+ * fdt_get_reg - Fill buffer by information from DT
+ */
+static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,
+ const u32 *cell, int n)
+{
+ int i = 0, b, banks;
+ int parent_offset = fdt_parent_offset(fdt, nodeoffset);
+ int address_cells = fdt_address_cells(fdt, parent_offset);
+ int size_cells = fdt_size_cells(fdt, parent_offset);
+ char *p = buf;
+ u64 val;
+ u64 vals;
+
+ debug("%s: addr_cells=%x, size_cell=%x, buf=%p, cell=%p\n",
+ __func__, address_cells, size_cells, buf, cell);
+
+ /* Check memory bank setup */
+ banks = n % (address_cells + size_cells);
+ if (banks)
+ panic("Incorrect memory setup cells=%d, ac=%d, sc=%d\n",
+ n, address_cells, size_cells);
+
+ banks = n / (address_cells + size_cells);
+
+ for (b = 0; b < banks; b++) {
+ debug("%s: Bank #%d:\n", __func__, b);
+ if (address_cells == 2) {
+ val = cell[i + 1];
+ val <<= 32;
+ val |= cell[i];
+ val = fdt64_to_cpu(val);
+ debug("%s: addr64=%llx, ptr=%p, cell=%p\n",
+ __func__, val, p, &cell[i]);
+ *(phys_addr_t *)p = val;
+ } else {
+ debug("%s: addr32=%x, ptr=%p\n",
+ __func__, fdt32_to_cpu(cell[i]), p);
+ *(phys_addr_t *)p = fdt32_to_cpu(cell[i]);
+ }
+ p += sizeof(phys_addr_t);
+ i += address_cells;
+
+ debug("%s: pa=%p, i=%x, size=%zu\n", __func__, p, i,
+ sizeof(phys_addr_t));
+
+ if (size_cells == 2) {
+ vals = cell[i + 1];
+ vals <<= 32;
+ vals |= cell[i];
+ vals = fdt64_to_cpu(vals);
+
+ debug("%s: size64=%llx, ptr=%p, cell=%p\n",
+ __func__, vals, p, &cell[i]);
+ *(phys_size_t *)p = vals;
+ } else {
+ debug("%s: size32=%x, ptr=%p\n",
+ __func__, fdt32_to_cpu(cell[i]), p);
+ *(phys_size_t *)p = fdt32_to_cpu(cell[i]);
+ }
+ p += sizeof(phys_size_t);
+ i += size_cells;
+
+ debug("%s: ps=%p, i=%x, size=%zu\n",
+ __func__, p, i, sizeof(phys_size_t));
+ }
+
+ /* Return the first address size */
+ return *(phys_size_t *)((char *)buf + sizeof(phys_addr_t));
+}
+
+#define FDT_REG_SIZE sizeof(u32)
+/* Temp location for sharing data for storing */
+static u8 tmp[CONFIG_NR_DRAM_BANKS * 16]; /* Up to 64-bit address + 64-bit size */
+
+void dram_init_banksize(void)
+{
+ int bank;
+
+ memcpy(&gd->bd->bi_dram[0], &tmp, sizeof(tmp));
+
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ debug("Bank #%d: start %llx\n", bank,
+ (unsigned long long)gd->bd->bi_dram[bank].start);
+ debug("Bank #%d: size %llx\n", bank,
+ (unsigned long long)gd->bd->bi_dram[bank].size);
+ }
+}
+
int dram_init(void)
{
- int node;
- fdt_addr_t addr;
- fdt_size_t size;
+ int node, len;
const void *blob = gd->fdt_blob;
+ const u32 *cell;
- node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
- "memory", 7);
- if (node == -FDT_ERR_NOTFOUND) {
- debug("ZYNQ DRAM: Can't get memory node\n");
- return -1;
+ memset(&tmp, 0, sizeof(tmp));
+
+ /* find or create "/memory" node. */
+ node = fdt_subnode_offset(blob, 0, "memory");
+ if (node < 0) {
+ printf("%s: Can't get memory node\n", __func__);
+ return node;
}
- addr = fdtdec_get_addr_size(blob, node, "reg", &size);
- if (addr == FDT_ADDR_T_NONE || size == 0) {
- debug("ZYNQ DRAM: Can't get base address or size\n");
+
+ /* Get pointer to cells and lenght of it */
+ cell = fdt_getprop(blob, node, "reg", &len);
+ if (!cell) {
+ printf("%s: Can't get reg property\n", __func__);
return -1;
}
- gd->ram_size = size;
+
+ gd->ram_size = fdt_get_reg(blob, node, &tmp, cell, len / FDT_REG_SIZE);
+
+ debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
+
+ zynq_ddrc_init();
+
+ return 0;
+}
+#else
+int dram_init(void)
+{
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
zynq_ddrc_init();
return 0;
--- /dev/null
+ menu "Command line interface"
+
+ config HUSH_PARSER
+ bool "Use hush shell"
+ select SYS_HUSH_PARSER
+ help
+ This option enables the "hush" shell (from Busybox) as command line
+ interpreter, thus enabling powerful command line syntax like
+ if...then...else...fi conditionals or `&&' and '||'
+ constructs ("shell scripts").
+
+ If disabled, you get the old, much simpler behaviour with a somewhat
+ smaller memory footprint.
+
+ config SYS_HUSH_PARSER
+ bool
+ help
+ Backward compatibility.
+
+ config SYS_PROMPT
+ string "Shell prompt"
+ default "=> "
+ help
+ This string is displayed in the command line to the left of the
+ cursor.
+
+ menu "Autoboot options"
+
+ config AUTOBOOT_KEYED
+ bool "Stop autobooting via specific input key / string"
+ default n
+ help
+ This option enables stopping (aborting) of the automatic
+ boot feature only by issuing a specific input key or
+ string. If not enabled, any input key will abort the
+ U-Boot automatic booting process and bring the device
+ to the U-Boot prompt for user input.
+
+ config AUTOBOOT_PROMPT
+ string "Autoboot stop prompt"
+ depends on AUTOBOOT_KEYED
+ default "Autoboot in %d seconds\\n"
+ help
+ This string is displayed before the boot delay selected by
+ CONFIG_BOOTDELAY starts. If it is not defined there is no
+ output indicating that autoboot is in progress.
+
+ Note that this define is used as the (only) argument to a
+ printf() call, so it may contain '%' format specifications,
+ provided that it also includes, sepearated by commas exactly
+ like in a printf statement, the required arguments. It is
+ the responsibility of the user to select only such arguments
+ that are valid in the given context.
+
+ config AUTOBOOT_ENCRYPTION
+ bool "Enable encryption in autoboot stopping"
+ depends on AUTOBOOT_KEYED
+ default n
+
+ config AUTOBOOT_DELAY_STR
+ string "Delay autobooting via specific input key / string"
+ depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ help
+ This option delays the automatic boot feature by issuing
+ a specific input key or string. If CONFIG_AUTOBOOT_DELAY_STR
+ or the environment variable "bootdelaykey" is specified
+ and this string is received from console input before
+ autoboot starts booting, U-Boot gives a command prompt. The
+ U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is
+ used, otherwise it never times out.
+
+ config AUTOBOOT_STOP_STR
+ string "Stop autobooting via specific input key / string"
+ depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ help
+ This option enables stopping (aborting) of the automatic
+ boot feature only by issuing a specific input key or
+ string. If CONFIG_AUTOBOOT_STOP_STR or the environment
+ variable "bootstopkey" is specified and this string is
+ received from console input before autoboot starts booting,
+ U-Boot gives a command prompt. The U-Boot prompt never
+ times out, even if CONFIG_BOOT_RETRY_TIME is used.
+
+ config AUTOBOOT_KEYED_CTRLC
+ bool "Enable Ctrl-C autoboot interruption"
+ depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ default n
+ help
+ This option allows for the boot sequence to be interrupted
+ by ctrl-c, in addition to the "bootdelaykey" and "bootstopkey".
+ Setting this variable provides an escape sequence from the
+ limited "password" strings.
+
+ config AUTOBOOT_STOP_STR_SHA256
+ string "Stop autobooting via SHA256 encrypted password"
+ depends on AUTOBOOT_KEYED && AUTOBOOT_ENCRYPTION
+ help
+ This option adds the feature to only stop the autobooting,
+ and therefore boot into the U-Boot prompt, when the input
+ string / password matches a values that is encypted via
+ a SHA256 hash and saved in the environment.
+
+ endmenu
+
+ comment "Commands"
+
+ menu "Info commands"
+
+ config CMD_BDI
+ bool "bdinfo"
+ default y
+ help
+ Print board info
+
+ config CMD_CONSOLE
+ bool "coninfo"
+ default y
+ help
+ Print console devices and information.
+
+ config CMD_CPU
+ bool "cpu"
+ help
+ Print information about available CPUs. This normally shows the
+ number of CPUs, type (e.g. manufacturer, architecture, product or
+ internal name) and clock frequency. Other information may be
+ available depending on the CPU driver.
+
+ config CMD_LICENSE
+ bool "license"
+ help
+ Print GPL license text
+
+ endmenu
+
+ menu "Boot commands"
+
+ config CMD_BOOTD
+ bool "bootd"
+ default y
+ help
+ Run the command stored in the environment "bootcmd", i.e.
+ "bootd" does the same thing as "run bootcmd".
+
+ config CMD_BOOTM
+ bool "bootm"
+ default y
+ help
+ Boot an application image from the memory.
+
+ config CMD_ELF
+ bool "bootelf, bootvx"
+ default y
+ help
+ Boot an ELF/vxWorks image from the memory.
+
+ config CMD_GO
+ bool "go"
+ default y
+ help
+ Start an application at a given address.
+
+ config CMD_RUN
+ bool "run"
+ default y
+ help
+ Run the command in the given environment variable.
+
+ config CMD_IMI
+ bool "iminfo"
+ default y
+ help
+ Print header information for application image.
+
+ config CMD_IMLS
+ bool "imls"
+ default y
+ help
+ List all images found in flash
+
+ config CMD_XIMG
+ bool "imxtract"
+ default y
+ help
+ Extract a part of a multi-image.
+
+ config CMD_POWEROFF
+ bool
+
+ endmenu
+
+ menu "Environment commands"
+
+ config CMD_EXPORTENV
+ bool "env export"
+ default y
+ help
+ Export environments.
+
+ config CMD_IMPORTENV
+ bool "env import"
+ default y
+ help
+ Import environments.
+
+ config CMD_EDITENV
+ bool "editenv"
+ default y
+ help
+ Edit environment variable.
+
+ config CMD_SAVEENV
+ bool "saveenv"
+ default y
+ help
+ Save all environment variables into the compiled-in persistent
+ storage.
+
+ config CMD_ENV_EXISTS
+ bool "env exists"
+ default y
+ help
+ Check if a variable is defined in the environment for use in
+ shell scripting.
+
+ endmenu
+
+ menu "Memory commands"
+
+ config CMD_MEMORY
+ bool "md, mm, nm, mw, cp, cmp, base, loop"
+ default y
+ help
+ Memeory commands.
+ md - memory display
+ mm - memory modify (auto-incrementing address)
+ nm - memory modify (constant address)
+ mw - memory write (fill)
+ cp - memory copy
+ cmp - memory compare
+ base - print or set address offset
+ loop - initinite loop on address range
+
+ config CMD_CRC32
+ bool "crc32"
+ default y
+ help
+ Compute CRC32.
+
+ config LOOPW
+ bool "loopw"
+ help
+ Infinite write loop on address range
+
+ config CMD_MEMTEST
+ bool "memtest"
+ help
+ Simple RAM read/write test.
+
+ config CMD_MX_CYCLIC
+ bool "mdc, mwc"
+ help
+ mdc - memory display cyclic
+ mwc - memory write cyclic
+
+ config CMD_MEMINFO
+ bool "meminfo"
+ help
+ Display memory information.
+
+ endmenu
+
+ menu "Device access commands"
+
+ config CMD_DM
+ bool "dm - Access to driver model information"
+ depends on DM
+ default y
+ help
+ Provides access to driver model data structures and information,
+ such as a list of devices, list of uclasses and the state of each
+ device (e.g. activated). This is not required for operation, but
+ can be useful to see the state of driver model for debugging or
+ interest.
+
+ config CMD_DEMO
+ bool "demo - Demonstration commands for driver model"
+ depends on DM
+ help
+ Provides a 'demo' command which can be used to play around with
+ driver model. To use this properly you will need to enable one or
+ both of the demo devices (DM_DEMO_SHAPE and DM_DEMO_SIMPLE).
+ Otherwise you will always get an empty list of devices. The demo
+ devices are defined in the sandbox device tree, so the easiest
+ option is to use sandbox and pass the -d point to sandbox's
+ u-boot.dtb file.
+
+ config CMD_LOADB
+ bool "loadb"
+ default y
+ help
+ Load a binary file over serial line.
+
+ config CMD_LOADS
+ bool "loads"
+ default y
+ help
+ Load an S-Record file over serial line
+
+ config CMD_FLASH
+ bool "flinfo, erase, protect"
+ default y
+ help
+ NOR flash support.
+ flinfo - print FLASH memory information
+ erase - FLASH memory
+ protect - enable or disable FLASH write protection
+
+ config CMD_ARMFLASH
+ depends on FLASH_CFI_DRIVER
+ bool "armflash"
+ help
+ ARM Ltd reference designs flash partition access
+
+ config CMD_NAND
+ bool "nand"
+ help
+ NAND support.
+
+ config CMD_SF
+ bool "sf"
+ help
+ SPI Flash support
+
+ config CMD_SPI
+ bool "sspi"
+ help
+ SPI utility command.
+
+ config CMD_I2C
+ bool "i2c"
+ help
+ I2C support.
+
+ config CMD_USB
+ bool "usb"
+ help
+ USB support.
+
+ config CMD_FPGA
+ bool "fpga"
+ default y
+ help
+ FPGA support.
+
+ config CMD_REMOTEPROC
+ bool "remoteproc"
+ depends on REMOTEPROC
+ help
+ Support for Remote Processor control
+
+ config CMD_GPIO
+ bool "gpio"
+ help
+ GPIO support.
+
+ endmenu
+
+
+ menu "Shell scripting commands"
+
+ config CMD_ECHO
+ bool "echo"
+ default y
+ help
+ Echo args to console
+
+ config CMD_ITEST
+ bool "itest"
+ default y
+ help
+ Return true/false on integer compare.
+
+ config CMD_SOURCE
+ bool "source"
+ default y
+ help
+ Run script from memory
+
+ config CMD_SETEXPR
+ bool "setexpr"
+ default y
+ help
+ Evaluate boolean and math expressions and store the result in an env
+ variable.
+ Also supports loading the value at a memory location into a variable.
+ If CONFIG_REGEX is enabled, setexpr also supports a gsub function.
+
+ endmenu
+
+ menu "Network commands"
+
+ config CMD_NET
+ bool "bootp, tftpboot"
+ select NET
+ default y
+ help
+ Network commands.
+ bootp - boot image via network using BOOTP/TFTP protocol
+ tftpboot - boot image via network using TFTP protocol
+
+ config CMD_TFTPPUT
+ bool "tftp put"
+ help
+ TFTP put command, for uploading files to a server
+
+ config CMD_TFTPSRV
+ bool "tftpsrv"
+ help
+ Act as a TFTP server and boot the first received file
+
+ config CMD_RARP
+ bool "rarpboot"
+ help
+ Boot image via network using RARP/TFTP protocol
+
+ config CMD_DHCP
+ bool "dhcp"
+ help
+ Boot image via network using DHCP/TFTP protocol
+
+ config CMD_NFS
+ bool "nfs"
+ default y
+ help
+ Boot image via network using NFS protocol.
+
+ config CMD_PING
+ bool "ping"
+ help
+ Send ICMP ECHO_REQUEST to network host
+
+ config CMD_CDP
+ bool "cdp"
+ help
+ Perform CDP network configuration
+
+ config CMD_SNTP
+ bool "sntp"
+ help
+ Synchronize RTC via network
+
+ config CMD_DNS
+ bool "dns"
+ help
+ Lookup the IP of a hostname
+
+ config CMD_LINK_LOCAL
+ bool "linklocal"
+ help
+ Acquire a network IP address using the link-local protocol
+
+ endmenu
+
+ menu "Misc commands"
+
+ config CMD_AMBAPP
+ bool "ambapp"
+ depends on LEON3
+ default y
+ help
+ Lists AMBA Plug-n-Play information.
+
+ config SYS_AMBAPP_PRINT_ON_STARTUP
+ bool "Show AMBA PnP info on startup"
+ depends on CMD_AMBAPP
+ default n
+ help
+ Show AMBA Plug-n-Play information on startup.
+
+ config CMD_TIME
+ bool "time"
+ help
+ Run commands and summarize execution time.
+
+ # TODO: rename to CMD_SLEEP
+ config CMD_MISC
+ bool "sleep"
+ default y
+ help
+ Delay execution for some time
+
+ config CMD_TIMER
+ bool "timer"
+ help
+ Access the system timer.
+
+ config CMD_SETGETDCR
+ bool "getdcr, setdcr, getidcr, setidcr"
+ depends on 4xx
+ default y
+ help
+ getdcr - Get an AMCC PPC 4xx DCR's value
+ setdcr - Set an AMCC PPC 4xx DCR's value
+ getidcr - Get a register value via indirect DCR addressing
+ setidcr - Set a register value via indirect DCR addressing
+
+ config CMD_SOUND
+ bool "sound"
+ depends on SOUND
+ help
+ This provides basic access to the U-Boot's sound support. The main
+ feature is to play a beep.
+
+ sound init - set up sound system
+ sound play - play a sound
+
++config CMD_ZYNQ_AES
++ bool "Zynq AES"
++ depends on CMD_ZYNQ_RSA
++ help
++ Decrypts the encrypted image present in source address
++ and places the decrypted image at destination address
++
++config CMD_ZYNQ_RSA
++ bool "Zynq RSA"
++ help
++ Verifies the authenticated and encrypted zynq images.
++
+ endmenu
+
+ config CMD_BOOTSTAGE
+ bool "Enable the 'bootstage' command"
+ depends on BOOTSTAGE
+ help
+ Add a 'bootstage' command which supports printing a report
+ and un/stashing of bootstage data.
+
+ menu "Power commands"
+ config CMD_PMIC
+ bool "Enable Driver Model PMIC command"
+ depends on DM_PMIC
+ help
+ This is the pmic command, based on a driver model pmic's API.
+ Command features are unchanged:
+ - list - list pmic devices
+ - pmic dev <id> - show or [set] operating pmic device (NEW)
+ - pmic dump - dump registers
+ - pmic read address - read byte of register at address
+ - pmic write address - write byte to register at address
+ The only one change for this command is 'dev' subcommand.
+
+ config CMD_REGULATOR
+ bool "Enable Driver Model REGULATOR command"
+ depends on DM_REGULATOR
+ help
+ This command is based on driver model regulator's API.
+ User interface features:
+ - list - list regulator devices
+ - regulator dev <id> - show or [set] operating regulator device
+ - regulator info - print constraints info
+ - regulator status - print operating status
+ - regulator value <val] <-f> - print/[set] voltage value [uV]
+ - regulator current <val> - print/[set] current value [uA]
+ - regulator mode <id> - print/[set] operating mode id
+ - regulator enable - enable the regulator output
+ - regulator disable - disable the regulator output
+
+ The '-f' (force) option can be used for set the value which exceeds
+ the limits, which are found in device-tree and are kept in regulator's
+ uclass platdata structure.
+
+ endmenu
+
+ menu "Security commands"
+ config CMD_TPM
+ bool "Enable the 'tpm' command"
+ depends on TPM
+ help
+ This provides a means to talk to a TPM from the command line. A wide
+ range of commands if provided - see 'tpm help' for details. The
+ command requires a suitable TPM on your board and the correct driver
+ must be enabled.
+
+ config CMD_TPM_TEST
+ bool "Enable the 'tpm test' command"
+ depends on CMD_TPM
+ help
+ This provides a a series of tests to confirm that the TPM is working
+ correctly. The tests cover initialisation, non-volatile RAM, extend,
+ global lock and checking that timing is within expectations. The
+ tests pass correctly on Infineon TPMs but may need to be adjusted
+ for other devices.
+
+ endmenu
+
+ endmenu
--- /dev/null
+ #
+ # (C) Copyright 2004-2006
+ # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ #
+ # SPDX-License-Identifier: GPL-2.0+
+ #
+
+ ifndef CONFIG_SPL_BUILD
+ # core command
+ obj-y += boot.o
+ obj-$(CONFIG_CMD_BOOTM) += bootm.o
+ obj-y += help.o
+ obj-y += version.o
+
+ # command
+ obj-$(CONFIG_CMD_AES) += aes.o
+ obj-$(CONFIG_CMD_AMBAPP) += ambapp.o
+ obj-$(CONFIG_CMD_ARMFLASH) += armflash.o
+ obj-$(CONFIG_SOURCE) += source.o
+ obj-$(CONFIG_CMD_SOURCE) += source.o
+ obj-$(CONFIG_CMD_BDI) += bdinfo.o
+ obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
+ obj-$(CONFIG_CMD_BMP) += bmp.o
+ obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
+ obj-$(CONFIG_CMD_BOOTLDR) += bootldr.o
+ obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
+ obj-$(CONFIG_CMD_CACHE) += cache.o
+ obj-$(CONFIG_CMD_CBFS) += cbfs.o
+ obj-$(CONFIG_CMD_CLK) += clk.o
+ obj-$(CONFIG_CMD_CONSOLE) += console.o
+ obj-$(CONFIG_CMD_CPLBINFO) += cplbinfo.o
+ obj-$(CONFIG_CMD_CPU) += cpu.o
+ obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
+ obj-$(CONFIG_CMD_DATE) += date.o
+ obj-$(CONFIG_CMD_DEMO) += demo.o
+ obj-$(CONFIG_CMD_SOUND) += sound.o
+ ifdef CONFIG_4xx
+ obj-$(CONFIG_CMD_SETGETDCR) += dcr.o
+ endif
+ ifdef CONFIG_POST
+ obj-$(CONFIG_CMD_DIAG) += diag.o
+ endif
+ obj-$(CONFIG_CMD_DISPLAY) += display.o
+ obj-$(CONFIG_CMD_DTT) += dtt.o
+ obj-$(CONFIG_CMD_ECHO) += echo.o
+ obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
+ obj-$(CONFIG_CMD_EEPROM) += eeprom.o
+ obj-$(CONFIG_EFI_STUB) += efi.o
+ obj-$(CONFIG_CMD_ELF) += elf.o
+ obj-$(CONFIG_SYS_HUSH_PARSER) += exit.o
+ obj-$(CONFIG_CMD_EXT4) += ext4.o
+ obj-$(CONFIG_CMD_EXT2) += ext2.o
+ obj-$(CONFIG_CMD_FAT) += fat.o
+ obj-$(CONFIG_CMD_FDC) += fdc.o
+ obj-$(CONFIG_OF_LIBFDT) += fdt.o
+ obj-$(CONFIG_CMD_FITUPD) += fitupd.o
+ obj-$(CONFIG_CMD_FLASH) += flash.o
+ ifdef CONFIG_FPGA
+ obj-$(CONFIG_CMD_FPGA) += fpga.o
+ endif
+ obj-$(CONFIG_CMD_FPGAD) += fpgad.o
+ obj-$(CONFIG_CMD_FS_GENERIC) += fs.o
+ obj-$(CONFIG_CMD_FUSE) += fuse.o
+ obj-$(CONFIG_CMD_GETTIME) += gettime.o
+ obj-$(CONFIG_CMD_GPIO) += gpio.o
+ obj-$(CONFIG_CMD_I2C) += i2c.o
+ obj-$(CONFIG_CMD_IOTRACE) += iotrace.o
+ obj-$(CONFIG_CMD_HASH) += hash.o
+ obj-$(CONFIG_CMD_IDE) += ide.o
+ obj-$(CONFIG_CMD_IMMAP) += immap.o
+ obj-$(CONFIG_CMD_INI) += ini.o
+ obj-$(CONFIG_CMD_IRQ) += irq.o
+ obj-$(CONFIG_CMD_ITEST) += itest.o
+ obj-$(CONFIG_CMD_JFFS2) += jffs2.o
+ obj-$(CONFIG_CMD_CRAMFS) += cramfs.o
+ obj-$(CONFIG_CMD_LDRINFO) += ldrinfo.o
+ obj-$(CONFIG_CMD_LED) += led.o
+ obj-$(CONFIG_CMD_LICENSE) += license.o
+ obj-y += load.o
+ obj-$(CONFIG_LOGBUFFER) += log.o
+ obj-$(CONFIG_ID_EEPROM) += mac.o
+ obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
+ obj-$(CONFIG_CMD_MEMORY) += mem.o
+ obj-$(CONFIG_CMD_IO) += io.o
+ obj-$(CONFIG_CMD_MFSL) += mfsl.o
+ obj-$(CONFIG_CMD_MII) += mii.o
+ ifdef CONFIG_PHYLIB
+ obj-$(CONFIG_CMD_MII) += mdio.o
+ endif
+ obj-$(CONFIG_CMD_MISC) += misc.o
+ obj-$(CONFIG_CMD_MMC) += mmc.o
+ obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
+ obj-$(CONFIG_MP) += mp.o
+ obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
+ obj-$(CONFIG_CMD_NAND) += nand.o
+ obj-$(CONFIG_CMD_NET) += net.o
+ obj-$(CONFIG_CMD_ONENAND) += onenand.o
+ obj-$(CONFIG_CMD_OTP) += otp.o
+ obj-$(CONFIG_CMD_PART) += part.o
+ ifdef CONFIG_PCI
+ obj-$(CONFIG_CMD_PCI) += pci.o
+ endif
+ obj-y += pcmcia.o
+ obj-$(CONFIG_CMD_PORTIO) += portio.o
+ obj-$(CONFIG_CMD_PXE) += pxe.o
+ obj-$(CONFIG_CMD_READ) += read.o
+ obj-$(CONFIG_CMD_REGINFO) += reginfo.o
+ obj-$(CONFIG_CMD_REISER) += reiser.o
+ obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
+ obj-$(CONFIG_SANDBOX) += host.o
+ obj-$(CONFIG_CMD_SATA) += sata.o
+ obj-$(CONFIG_CMD_SF) += sf.o
+ obj-$(CONFIG_CMD_SCSI) += scsi.o
+ obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
+ obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
+ obj-$(CONFIG_CMD_SOFTSWITCH) += softswitch.o
+ obj-$(CONFIG_CMD_SPI) += spi.o
+ obj-$(CONFIG_CMD_SPIBOOTLDR) += spibootldr.o
+ obj-$(CONFIG_CMD_STRINGS) += strings.o
+ obj-$(CONFIG_CMD_TERMINAL) += terminal.o
+ obj-$(CONFIG_CMD_TIME) += time.o
+ obj-$(CONFIG_CMD_TRACE) += trace.o
+ obj-$(CONFIG_SYS_HUSH_PARSER) += test.o
+ obj-$(CONFIG_CMD_TPM) += tpm.o
+ obj-$(CONFIG_CMD_TPM_TEST) += tpm_test.o
+ obj-$(CONFIG_CMD_TSI148) += tsi148.o
+ obj-$(CONFIG_CMD_UBI) += ubi.o
+ obj-$(CONFIG_CMD_UBIFS) += ubifs.o
+ obj-$(CONFIG_CMD_UNIVERSE) += universe.o
+ obj-$(CONFIG_CMD_UNZIP) += unzip.o
+ ifdef CONFIG_LZMA
+ obj-$(CONFIG_CMD_LZMADEC) += lzmadec.o
+ endif
+
+ obj-$(CONFIG_CMD_USB) += usb.o
+ obj-$(CONFIG_CMD_FASTBOOT) += fastboot.o
+ obj-$(CONFIG_CMD_FS_UUID) += fs_uuid.o
+
+ obj-$(CONFIG_CMD_USB_MASS_STORAGE) += usb_mass_storage.o
+ obj-$(CONFIG_CMD_THOR_DOWNLOAD) += thordown.o
+ obj-$(CONFIG_CMD_XIMG) += ximg.o
+ obj-$(CONFIG_YAFFS2) += yaffs2.o
+ obj-$(CONFIG_CMD_SPL) += spl.o
+ obj-$(CONFIG_CMD_ZIP) += zip.o
+ obj-$(CONFIG_CMD_ZFS) += zfs.o
++obj-$(CONFIG_CMD_ZYNQ_RSA) += zynq_rsa.o
+
+ obj-$(CONFIG_CMD_DFU) += dfu.o
+ obj-$(CONFIG_CMD_GPT) += gpt.o
+ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
+
+ # Power
+ obj-$(CONFIG_CMD_PMIC) += pmic.o
+ obj-$(CONFIG_CMD_REGULATOR) += regulator.o
+ endif # !CONFIG_SPL_BUILD
+
+ ifdef CONFIG_SPL_BUILD
+ ifdef CONFIG_SPL_SATA_SUPPORT
+ obj-$(CONFIG_CMD_SCSI) += scsi.o
+ endif
+ endif # CONFIG_SPL_BUILD
+
+ obj-$(CONFIG_CMD_BLOB) += blob.o
+
+ # core command
+ obj-y += nvedit.o
+ obj-y += disk.o
CONFIG_CMD_TIMER=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_MMC=y
+ CONFIG_ZYNQ_SDHCI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_DM_ETH=y
CONFIG_ZYNQ_GEM=y
# CONFIG_REGEX is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_ZYNQ_SDHCI=y
CONFIG_ZYNQ_GEM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART=y
obj-$(CONFIG_MVSATA_IDE) += mvsata_ide.o
obj-$(CONFIG_MX51_PATA) += mxc_ata.o
obj-$(CONFIG_PATA_BFIN) += pata_bfin.o
+obj-$(CONFIG_SATA_CEVA) += sata_ceva.o
obj-$(CONFIG_SATA_DWC) += sata_dwc.o
+ obj-$(CONFIG_SATA_MV) += sata_mv.o
obj-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
obj-$(CONFIG_SATA_SIL) += sata_sil.o
obj-$(CONFIG_IDE_SIL680) += sil680.o
help
Say yes here to support Vybrid vf610 GPIOs.
+ config PIC32_GPIO
+ bool "Microchip PIC32 GPIO driver"
+ depends on DM_GPIO && MACH_PIC32
+ default y
+ help
+ Say yes here to support Microchip PIC32 GPIOs.
+
+config ZYNQ_GPIO
+ bool "Zynq GPIO driver"
+ depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP)
+ default y
+ help
+ Supports GPIO access on Zynq SoC.
+
endmenu
/* sf param flags */
enum {
- #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
- SECT_4K = 1 << 0,
+ #ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
+ SECT_4K = 0,
#else
- SECT_4K = 0 << 0,
+ SECT_4K = BIT(0),
#endif
- SECT_32K = 1 << 1,
- E_FSR = 1 << 2,
- SST_WP = 1 << 3,
- WR_QPP = 1 << 4,
- SST_BP = 1 << 5,
- SST_LOCKBP = 1 << 6,
+ SECT_32K = BIT(1),
+ E_FSR = BIT(2),
- SST_WR = BIT(3),
++ SST_WP = BIT(3),
+ WR_QPP = BIT(4),
++ SST_BP = BIT(5),
++ SST_LOCKBP = BIT(6),
};
+#define SST_WR (SST_BP | SST_WP)
+
enum spi_nor_option_flags {
- SNOR_F_SST_WR = (1 << 0),
- SNOR_F_USE_FSR = (1 << 1),
+ SNOR_F_SST_WR = BIT(0),
+ SNOR_F_USE_FSR = BIT(1),
};
#define SPI_FLASH_3B_ADDR_LEN 3
#define CMD_WRITE_STATUS 0x01
#define CMD_PAGE_PROGRAM 0x02
#define CMD_WRITE_DISABLE 0x04
- #define CMD_READ_STATUS 0x05
- #define CMD_QUAD_PAGE_PROGRAM 0x32
- #define CMD_READ_STATUS1 0x35
#define CMD_WRITE_ENABLE 0x06
+ #define CMD_QUAD_PAGE_PROGRAM 0x32
+ #define CMD_WRITE_EVCR 0x61
+
+#define CMD_READ_CONFIG 0x35
+#define CMD_FLAG_STATUS 0x70
+/* Used for Micron, Macronix and Winbond flashes */
+#define CMD_ENTER_4B_ADDR 0xB7
+#define CMD_EXIT_4B_ADDR 0xE9
+
/* Read commands */
#define CMD_READ_ARRAY_SLOW 0x03
#define CMD_READ_ARRAY_FAST 0x0b
debug("SF: Failed to claim SPI bus: %d\n", ret);
return ret;
}
+#if 0
+ if (spi->option == SF_DUAL_PARALLEL_FLASH)
+ spi->flags |= SPI_XFER_LOWER;
+ /* Read the ID codes */
+ ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+ if (ret) {
+ printf("SF: Failed to get idcodes\n");
+ goto err_read_id;
+ }
+
+#ifdef CONFIG_SPI_GENERIC
+ if (spi->option == SF_DUAL_PARALLEL_FLASH) {
+ spi->flags |= SPI_XFER_UPPER;
+ ret = spi_flash_cmd(spi, CMD_READ_ID, idcode_up,
+ sizeof(idcode_up));
+ if (ret) {
+ printf("SF: Failed to get idcodes\n");
+ goto err_read_id;
+ }
+ for (i = 0; i < sizeof(idcode); i++) {
+ if (idcode[i] != idcode_up[i]) {
+ printf("SF: Failed to get same idcodes\n");
+ goto err_read_id;
+ }
+ }
+ }
+#endif
+#ifdef DEBUG
+ printf("SF: Got idcodes\n");
+ print_buffer(0, idcode, 1, sizeof(idcode), 0);
+#endif
+
+ if (spi_flash_validate_params(spi, idcode, flash)) {
+
+#endif
ret = spi_flash_scan(flash);
- if (ret) {
- ret = -EINVAL;
+ if (ret)
goto err_read_id;
- }
#ifdef CONFIG_SPI_FLASH_MTD
ret = spi_flash_mtd_register(flash);
/* Cache Definitions */
#define CONFIG_SYS_CACHELINE_SIZE 64
- #ifndef CONFIG_IDENT_STRING
- #define CONFIG_IDENT_STRING " Xilinx ZynqMP"
+ #if !defined(CONFIG_IDENT_STRING)
+ # define CONFIG_IDENT_STRING " Xilinx ZynqMP"
#endif
+#define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.Xilinx_ZynqMP"
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+/* Text base on 16MB for now - 0 doesn't work */
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT
# define CONFIG_CMD_SF
#endif
- #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
+#ifdef CONFIG_ZYNQMP_QSPI
+# define CONFIG_SPI_GENERIC
+# define CONFIG_SF_DEFAULT_SPEED 30000000
+# define CONFIG_SF_DUAL_FLASH
+# define CONFIG_SPI_FLASH_SPANSION
+# define CONFIG_SPI_FLASH_STMICRO
+# define CONFIG_SPI_FLASH_WINBOND
+# define CONFIG_CMD_SPI
+# define CONFIG_CMD_SF
+# define CONFIG_CMD_SF_TEST
+#endif
+
+/* NAND */
+#ifdef CONFIG_NAND_ARASAN
+# define CONFIG_CMD_NAND
+# define CONFIG_CMD_NAND_LOCK_UNLOCK
+# define CONFIG_SYS_MAX_NAND_DEVICE 1
+# define CONFIG_SYS_NAND_SELF_INIT
+# define CONFIG_SYS_NAND_ONFI_DETECTION
+# define CONFIG_MTD_DEVICE
+#endif
+
+ #if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI
- # define CONFIG_ZYNQ_SDHCI
# define CONFIG_CMD_MMC
+# define CONFIG_SUPPORT_EMMC_BOOT
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
# endif
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHY_MARVELL
+ # define CONFIG_PHY_REALTEK
+# define CONFIG_PHY_XILINX
+# define CONFIG_SYS_ENET
# define CONFIG_BOOTP_SERVERIP
# define CONFIG_BOOTP_BOOTPATH
# define CONFIG_BOOTP_GATEWAY
#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
+/* FPGA support */
+#define CONFIG_SPL_FPGA_SUPPORT
+#define CONFIG_SPL_FPGA_LOAD_ADDR 0x1000000
+/* #define CONFIG_SPL_FPGA_BIT */
+#ifdef CONFIG_SPL_FPGA_BIT
+# define CONFIG_SPL_FPGA_LOAD_ARGS_NAME "download.bit"
+#else
+# define CONFIG_SPL_FPGA_LOAD_ARGS_NAME "fpga.bin"
+#endif
+
/* MMC support */
- #ifdef CONFIG_ZYNQ_SDHCI0
+ #ifdef CONFIG_ZYNQ_SDHCI
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
#define CONFIG_SYS_NO_FLASH
- #define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_USB
+
#include <configs/zynq-common.h>
#endif /* __CONFIG_ZYNQ_MICROZED_H */
#define CONFIG_SYS_NO_FLASH
- #if defined(CONFIG_ZC770_XM010)
- # define CONFIG_ZYNQ_SDHCI0
-
- #elif defined(CONFIG_ZC770_XM011)
-#if defined(CONFIG_ZC770_XM012)
++#if defined(CONFIG_ZC770_XM011)
+# define CONFIG_NAND_ZYNQ
+
- #elif defined(CONFIG_ZC770_XM011)
-
+#elif defined(CONFIG_ZC770_XM012)
# undef CONFIG_SYS_NO_FLASH
#endif
#define _SPI_H_
/* SPI mode flags */
- #define SPI_CPHA 0x01 /* clock phase */
- #define SPI_CPOL 0x02 /* clock polarity */
- #define SPI_MODE_0 (0|0) /* (original MicroWire) */
- #define SPI_MODE_1 (0|SPI_CPHA)
- #define SPI_MODE_2 (SPI_CPOL|0)
- #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
- #define SPI_CS_HIGH 0x04 /* CS active high */
- #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
- #define SPI_3WIRE 0x10 /* SI/SO signals shared */
- #define SPI_LOOP 0x20 /* loopback mode */
- #define SPI_SLAVE 0x40 /* slave mode */
- #define SPI_PREAMBLE 0x80 /* Skip preamble bytes */
+ #define SPI_CPHA BIT(0) /* clock phase */
+ #define SPI_CPOL BIT(1) /* clock polarity */
+ #define SPI_MODE_0 (0|0) /* (original MicroWire) */
+ #define SPI_MODE_1 (0|SPI_CPHA)
+ #define SPI_MODE_2 (SPI_CPOL|0)
+ #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
+ #define SPI_CS_HIGH BIT(2) /* CS active high */
+ #define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
+ #define SPI_3WIRE BIT(4) /* SI/SO signals shared */
+ #define SPI_LOOP BIT(5) /* loopback mode */
+ #define SPI_SLAVE BIT(6) /* slave mode */
+ #define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */
+ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */
+ #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */
+ #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
- #define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */
- #define SPI_XFER_END 0x02 /* Deassert CS after transfer */
- #define SPI_XFER_MMAP 0x08 /* Memory Mapped start */
- #define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */
- #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
- #define SPI_XFER_U_PAGE (1 << 5)
+#define SPI_3BYTE_MODE 0x0
+#define SPI_4BYTE_MODE 0x1
+
+/* SPI transfer flags */
+#define SPI_XFER_STRIPE (1 << 6)
+#define SPI_XFER_MASK (3 << 8)
+#define SPI_XFER_LOWER (1 << 8)
+#define SPI_XFER_UPPER (2 << 8)
+
+/* SPI TX operation modes */
+#define SPI_OPM_TX_QPP (1 << 0)
+#define SPI_OPM_TX_BP (1 << 1)
+
+/* SPI RX operation modes */
+#define SPI_OPM_RX_AS (1 << 0)
+#define SPI_OPM_RX_AF (1 << 1)
+#define SPI_OPM_RX_DOUT (1 << 2)
+#define SPI_OPM_RX_DIO (1 << 3)
+#define SPI_OPM_RX_QOF (1 << 4)
+#define SPI_OPM_RX_QIOF (1 << 5)
+#define SPI_OPM_RX_EXTN (SPI_OPM_RX_AS | SPI_OPM_RX_AF | SPI_OPM_RX_DOUT | \
+ SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \
+ SPI_OPM_RX_QIOF)
+
+ /* SPI mode_rx flags */
+ #define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */
+ #define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */
+ #define SPI_RX_DUAL BIT(2) /* receive with 2 wires */
+ #define SPI_RX_QUAD BIT(3) /* receive with 4 wires */
+
/* SPI bus connection options - see enum spi_dual_flash */
#define SPI_CONN_DUAL_SHARED (1 << 0)
#define SPI_CONN_DUAL_SEPARATED (1 << 1)
* driver model this is the sequence number of the SPI
* bus (bus->seq) so does not need to be stored
* @cs: ID of the chip select connected to the slave.
- * @wordlen: Size of SPI word in number of bits
+ * @mode: SPI mode to use for this slave (see SPI mode flags)
+ * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
+ * @wordlen: Size of SPI word in number of bits
+ * @op_mode_rx: SPI RX operation mode.
+ * @op_mode_tx: SPI TX operation mode.
* @max_write_size: If non-zero, the maximum number of bytes which can
* be written at once, excluding command bytes.
* @memory_map: Address of read-only SPI flash access.
unsigned int bus;
unsigned int cs;
#endif
- unsigned int wordlen;
+ uint mode;
+ u8 mode_rx;
+ unsigned int wordlen;
+ u8 op_mode_rx;
+ u8 op_mode_tx;
unsigned int max_write_size;
void *memory_map;
u8 option;
-
+ u8 dio;
- u32 flags;
+ u32 bytemode;
+ u8 flags;
+ #define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */
+ #define SPI_XFER_END BIT(1) /* Deassert CS after transfer */
+ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
+ #define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
+ #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
+ #define SPI_XFER_U_PAGE BIT(4)
};
/**
projects / thirdparty / u-boot.git / commitdiff
