]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm64: zynqmp: Enable i2c via Kconfig
authorMichal Simek <michal.simek@xilinx.com>
Tue, 16 Jan 2018 13:38:35 +0000 (14:38 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 31 Jan 2018 12:15:44 +0000 (13:15 +0100)
Simplify board configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
13 files changed:
configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
configs/xilinx_zynqmp_zcu102_revA_defconfig
configs/xilinx_zynqmp_zcu102_revB_defconfig
configs/xilinx_zynqmp_zcu104_revA_defconfig
configs/xilinx_zynqmp_zcu104_revC_defconfig
configs/xilinx_zynqmp_zcu106_revA_defconfig
configs/xilinx_zynqmp_zcu111_revA_defconfig
include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h
include/configs/xilinx_zynqmp_zcu102.h
include/configs/xilinx_zynqmp_zcu104.h
include/configs/xilinx_zynqmp_zcu106.h
include/configs/xilinx_zynqmp_zcu111.h

index e05ab81f2ead110c3cf5474076ba1e1c8673629b..8ad81d32016d1025eccc605ac00b36f622a5b901 100644 (file)
@@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm017 dc3"
 CONFIG_ZYNQMP_USB=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm017-dc3"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index ab550538aef8b1fa8c04b9d3bc3539afe7e6e11c..1c2a936c821cbed9e8dbb4753f59d24f33d2ff7a 100644 (file)
@@ -9,6 +9,8 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 rev1.0"
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SPI_GENERIC=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-rev1.0"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index 97d7d0d200519473c88ed81839d7b582b24ca52a..4683b4c9315e4b9fc3081a93b47bbc7bde8ba951 100644 (file)
@@ -9,6 +9,8 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 revA"
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SPI_GENERIC=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revA"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index 0dceb1a6b4432b1c9ea8e1aac6d7c013fd129490..eb908264d39e5c189723d96bade74af15384be23 100644 (file)
@@ -9,6 +9,8 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 revB"
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SPI_GENERIC=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index 349ce17b353b1fbe64fa417478aa77c966d13f2c..e890e9cb452b98e526e237a8d6c757f1b5c8013c 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU104 revA"
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SPI_GENERIC=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revA"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index f9baa6bdbe833f4c2ee9180dc2332dc297e88bb8..6e51139d52575c639a0abbcf510acbd64f9850ae 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU104 revC"
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SPI_GENERIC=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revC"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index 7dcf720325d222b5c54099cebd50715644bae830..de1afbe301e99b4650562f18a9aa224d737ea791 100644 (file)
@@ -9,6 +9,8 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU106 revA"
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SPI_GENERIC=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu106-revA"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index 946c18778b6557d1ae100d1bcf5b7c6e47294d33..9e7be98ad9c2f95a1371028b150c00d38f529dc1 100644 (file)
@@ -7,6 +7,8 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU111"
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SPI_GENERIC=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu111-revA"
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
index 2be648b94157cea3e8d89a5e65c97cd681ede6fc..b74bdf1b54899b1fbd59c5863737a72bc3ce0d27 100644 (file)
@@ -11,8 +11,6 @@
 #define __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
 
 #define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
 
 #include <configs/xilinx_zynqmp.h>
 
index d46f0812b31dd5a615f4d07236a01320dd951798..3de44e5f49899c3007494b59d97e50395b265823 100644 (file)
@@ -11,8 +11,6 @@
 #define __CONFIG_ZYNQMP_ZCU102_H
 
 #define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
 #define CONFIG_SYS_I2C_MAX_HOPS                1
 #define CONFIG_SYS_NUM_I2C_BUSES       18
 #define CONFIG_SYS_I2C_BUSES   { \
index 9cc0ec1a745caf26fdb77787b403cef0f5f8d033..58f3c5c9cb461f906ed5aed1c33405905690b268 100644 (file)
@@ -11,7 +11,6 @@
 #define __CONFIG_ZYNQMP_ZCU104_H
 
 #define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQ_I2C1
 #define CONFIG_SYS_I2C_MAX_HOPS                1
 #define CONFIG_SYS_NUM_I2C_BUSES       9
 #define CONFIG_SYS_I2C_BUSES   { \
index 95ae0927c3e5dae58969d6149284df566487a09c..b8019d29d38cd21aba3322e280ad49bfe2b29373 100644 (file)
@@ -11,8 +11,6 @@
 #define __CONFIG_ZYNQMP_ZCU106_H
 
 #define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
 #define CONFIG_SYS_I2C_MAX_HOPS                1
 #define CONFIG_SYS_NUM_I2C_BUSES       18
 #define CONFIG_SYS_I2C_BUSES   { \
index 73e091c8f5331d69d71faf36c49dc942e3c984f3..ed32279d9f843717c567d57e75c48831a16234f0 100644 (file)
@@ -11,8 +11,6 @@
 #define __CONFIG_ZYNQMP_ZCU111_H
 
 #define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
 #define CONFIG_SYS_I2C_MAX_HOPS                1
 #define CONFIG_SYS_NUM_I2C_BUSES       21
 #define CONFIG_SYS_I2C_BUSES   { \