]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm64: zynqmp: Add support for QSPI boot
authorMichal Simek <michal.simek@xilinx.com>
Mon, 16 Jan 2017 11:07:33 +0000 (12:07 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 16 Jan 2017 12:05:07 +0000 (13:05 +0100)
This patch is enabling support for SPL QSPI boot.

First of all it is necessary to generate atf-spi.ub which is different
format than atf-uboot.ub (this can be made as legacy image too)

ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point
address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'`
aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR
-e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin
atf-uboot.ub
./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR
-n "atf-for-qspi" -E -d bl31.bin atf-spi.ub

This patch is using this QSPI layout with offsets:
0 boot.bin
512k atf-ub
640k u-boot.bin
1280k u-boot.img

Which corresponding by writing these images(read from MMC)
mmcinfo
sf probe
load mmc 0 10000000 boot.bin
sf erase 0 +$filesize
sf write 10000000 0 $filesize
load mmc 0 10000000 atf-spi.ub
sf erase 0x80000 +$filesize
sf write 10000000 0x80000 $filesize
load mmc 0 10000000 u-boot.bin
sf erase 0xa0000 +$filesize
sf write 10000000 0xa0000 $filesize
load mmc 0 10000000 u-boot.img
sf erase 0x140000 +$filesize
sf write 10000000 0x140000 $filesize

For testing u-boot running in EL3 you can break atf-spi.ub like this:
sf probe
sf erase 0x80000 +4

Then u-boot.img is executed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/cpu/armv8/zynqmp/spl.c
arch/arm/dts/zynqmp.dtsi
configs/xilinx_zynqmp_zcu102_defconfig
include/configs/xilinx_zynqmp.h

index 0a5f4306e8222e56b3e2e8339aa4f8ab790fb536..c9fe260c8da6fbfcff2c6b21ebaada3b2ea7ec4a 100644 (file)
@@ -95,6 +95,11 @@ u32 spl_boot_device(void)
 #ifdef CONFIG_SPL_SATA_SUPPORT
        case SW_SATA_MODE:
                return BOOT_DEVICE_SATA;
+#endif
+#ifdef CONFIG_SPL_SPI_SUPPORT
+       case QSPI_MODE_24BIT:
+       case QSPI_MODE_32BIT:
+               return BOOT_DEVICE_SPI;
 #endif
        default:
                printf("Invalid Boot Mode:0x%x\n", bootmode);
index e2e76d70fd37166262e527c45c7023790b9ec6ee..41df83d040aa7d587ed560f962ee53dc1270c9ac 100644 (file)
                };
 
                qspi: spi@ff0f0000 {
+                       u-boot,dm-pre-reloc;
                        compatible = "xlnx,zynqmp-qspi-1.0";
                        status = "disabled";
                        clock-names = "ref_clk", "pclk";
index 3c2f8adb89eea772393832d7c8f829e97418ff37..ee2c9484c97f00456839daf4d31cbff94a375407 100644 (file)
@@ -2,6 +2,8 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
 CONFIG_ARCH_ZYNQMP=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102"
index ca77b388a51bf59bd629e3b14f61d4b5cd14a0a4..7727bda2aaf4341c004bce9c1f0c69eff7dd455d 100644 (file)
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_RAM_DEVICE
 
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_KERNEL_OFFS     0x80000
+#define CONFIG_SYS_SPI_ARGS_OFFS       0xa0000
+#define CONFIG_SYS_SPI_ARGS_SIZE       0xa0000
+
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x140000
+
 /* u-boot is like dtb */
 #define CONFIG_SPL_FS_LOAD_ARGS_NAME   "u-boot.bin"
 #define CONFIG_SYS_SPL_ARGS_ADDR       0x8000000