net: gem: Preserve clk on emio interface

Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL
if the Ethernet interface is connect on EMIO

Do not enable emio for this standard board configuration for now.

Signed-off-by: David Andrey <david.andrey@netmodule.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 4859bfa211d120f8264bffef2bd0a99e727a7f81..03b6bf9cc3d75c2e7905ac625793dc8270655ae5 100644 (file)
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -145,11 +145,11 @@ int board_eth_init(bd_t *bis)
 #if defined(CONFIG_ZYNQ_GEM)
 # if defined(CONFIG_ZYNQ_GEM0)
        ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
-                                               CONFIG_ZYNQ_GEM_PHY_ADDR0);
+                                               CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
 # endif
 # if defined(CONFIG_ZYNQ_GEM1)
        ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
-                                               CONFIG_ZYNQ_GEM_PHY_ADDR1);
+                                               CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
 # endif
 #endif
 

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 5b3c8203ea9000a86e2e10e3b2b8946d6ecf9e64..2d2121198435ee31c4ee826468937d9c7d4980d9 100644 (file)
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -33,6 +33,7 @@
 #include <phy.h>
 #include <miiphy.h>
 #include <watchdog.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
 /* Bit/mask specification */
@@ -143,6 +144,7 @@ struct zynq_gem_priv {
        u32 rxbd_current;
        u32 rx_first_buf;
        int phyaddr;
+       u32 emio;
        int init;
        struct phy_device *phydev;
        struct mii_dev *bus;
@@ -388,8 +390,11 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
                clk = (5 << 20) | (8 << 8) | (0 << 4) | (1 << 0);
                break;
        }
-       /* FIXME maybe better to define gem address in hardware.h */
-       zynq_slcr_gem_clk_setup(dev->iobase != 0xE000B000, rclk, clk);
+
+       /* Change the rclk and clk only not using EMIO interface */
+       if (!priv->emio)
+               zynq_slcr_gem_clk_setup(dev->iobase !=
+                                       ZYNQ_GEM_BASEADDR0, rclk, clk);
 
 #else
        /* PHY Setup */
@@ -538,7 +543,7 @@ static int zynq_gem_miiphy_write(const char *devname, uchar addr,
        return phywrite(dev, addr, reg, val);
 }
 
-int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr)
+int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio)
 {
        struct eth_device *dev;
        struct zynq_gem_priv *priv;
@@ -555,6 +560,7 @@ int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr)
        priv = dev->priv;
 
        priv->phyaddr = phy_addr;
+       priv->emio = emio;
 
        sprintf(dev->name, "Gem.%x", base_addr);
 

diff --git a/include/netdev.h b/include/netdev.h
index e9b9ec39024fd751cd5f2d57b7ef1177a17ddce5..ff69eb8c901408a6b4a34499c502c2c776a51876 100644 (file)
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -104,7 +104,7 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
                                                        int txpp, int rxpp);
 int xilinx_ll_temac_initialize(bd_t *bis, unsigned long base_addr,
                                                int mode, unsigned long ctrl);
-int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr);
+int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio);
 /*
  * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
  * exported by a public hader file, we need a global definition at this point.