]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: rtl931x: psx28: specify POE MCU reset GPIO 22916/head
authorSven Eckelmann <sven@narfation.org>
Mon, 13 Apr 2026 14:21:22 +0000 (16:21 +0200)
committerRobert Marko <robimarko@gmail.com>
Tue, 14 Apr 2026 08:38:28 +0000 (10:38 +0200)
The MCU (GD32E230G8) which controls the RTL8239 POE++ PSE chips can
sometimes hang. In this case, it is necessary to to reset the chip using
the nRESET pin which is connected to the GPIO1 of the RTL8231 GPIO
expander.

For a reset, the `/sys/class/gpio/poe_mcu_reset/value` file must be set to
1 for a short period and then back to 0. After that, the poemgr must be
"restarted" to the MCU back in the expected state.

Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/22916
Signed-off-by: Robert Marko <robimarko@gmail.com>
target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts

index c7d36be3fe29f0fe0ccf287df4e254302a1f600d..488fe00b11a0cb038a738b685266246891e64d98 100644 (file)
                        gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
                };
        };
+
+       gpio-export {
+               compatible = "gpio-export";
+
+               poe_mcu_reset {
+                       gpio-export,name = "poe_mcu_reset";
+                       gpio-export,output = <1>;
+                       gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
+               };
+       };
 };
 
 &i2c_mst1 {