Merge tag 'single-binary-20251016' of https://github.com/philmd/qemu into staging

Various patches related to single binary work:

- Remove some VMSTATE_UINTTL() uses
- Replace target_ulong by vaddr / hwaddr / uint[32,64]_t
- Expand TCGv to TCGv_i32 for 32-bit targets
- Remove some unnecessary checks on TARGET_LONG_BITS
- Replace few HOST_BIG_ENDIAN preprocessor #ifdef by compile-time if() check
- Expand MO_TE to either MO_BE or MO_LE

Also:

- Remove legacy cpu_physical_memory_*() calls
- Fix HPPA FMPYADD opcode
- Unify Clément Mathieu--Drif email addresses

# -----BEGIN PGP SIGNATURE-----
#
# iQIyBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmjxCqIACgkQ4+MsLN6t
# wN5WLw/4yIeURXeqHkcys8bF6ysBFUlPvqJqz7+hmHEkQUI8NoOrcORCp82qxWVI
# FvVOPXhkNbEEh2qp7a2bDWDB0hs3xtX2NcR7d1Vh1cXfXHKwidJiXuhRvdsNKiFf
# SmZbXU/Hf212zANPqvPhrz+xR6IDeE5N1gcf6EI0C4peEp0UKwRPtalOnCApK5zo
# hZsp6Kmdbt8hd/jnlufPyeCClXCQaCxi4Ptv9F4+Ti1TcHv0xAP0xYkIBHeO8Z5r
# hxDk96IjJh6YxsH+bmjCdTsJtUiFbkvbkEP6jDkXCeQf9Q58sW8AG4wxVqcoVuHL
# QVT4BvUBSUFwArcgCCJNqjcsv5ZAtdZCXqHGcIQsz+Tr+I/VJ/LEKGtP7IoZNhcL
# 5aHpftT5ZUUgxd/rEkNe9wlJQIeX2w/RCAYWDcxz2ZG3CTv5FBzzwYG/r/akDhkm
# NrhBA99amKEKiS7oVuA9cd2tMbtQJiXxElOekgsTnU758RRzCT8WdYImoBeaGGMf
# Ahk/yaRxmWXR4rvucCNOhUGZkJICmrAvV9snypxiCD1tSuxXsuPY7pgSETkSTPFA
# xB3YFgz2ksw2zv/+Le1JBPjDixfN3CVouP5gR8XX8z9K6y7v87+bnZI0CCeayLao
# mRgeCHD1E0WBDsVV9yi9TnbzDF6SfNZP9XYcSHomrNt9qY0xcQ==
# =M9X9
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 16 Oct 2025 08:09:22 AM PDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'single-binary-20251016' of https://github.com/philmd/qemu: (79 commits)
  mailmap: Unify Clément Mathieu--Drif emails
  linux-user/microblaze: Fix little-endianness binary
  target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state()
  target/xtensa: Remove target_ulong use in xtensa_tr_translate_insn()
  target/xtensa: Replace legacy cpu_physical_memory_[un]map() calls
  target/tricore: Expand TCGv type for 32-bit target
  target/tricore: Un-inline various helpers
  target/tricore: Pass DisasContext as first argument
  target/tricore: Expand TCG helpers for 32-bit target
  target/tricore: Inline tcg_gen_ld32u_tl()
  target/tricore: Declare registers as TCGv_i32
  target/tricore: Replace target_ulong -> uint32_t in op_helper.c
  target/tricore: Remove unnecessary cast to target_ulong
  target/tricore: Remove target_ulong use in gen_addi_d()
  target/tricore: Remove target_ulong use in translate_insn() handler
  target/tricore: Replace target_ulong -> vaddr with tlb_fill() callees
  target/tricore: Remove target_ulong use in gen_goto_tb()
  target/sparc: Reduce inclusions of 'exec/cpu-common.h'
  target/sh4: Remove target_ulong use in gen_goto_tb()
  target/sh4: Use vaddr type for TLB virtual addresses
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>