arm64: dts: ti: k3-am64-ti-ipc-firmware: Refactor IPC cfg into new dtsi

The TI K3 AM64 SoCs have multiple programmable remote processors like
R5F, M4F etc. The TI SDKs for AM64 SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.

While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de> # phycore-am64x
Tested-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de> # phycore-am64x
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-34-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 5e0c82960a6c6e6791829cdb0d723ddfe4f7ccbf..02ef1dd92eaa85085a7928190afaa9d47b03ef45 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -52,60 +52,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               main_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               mcu_m4fss_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_m4fss_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@a5000000 {
-                       reg = <0x00 0xa5000000 0x00 0x00800000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 
        leds {
@@ -238,67 +184,6 @@
        status = "okay";
 };
 
-&mailbox0_cluster2 {
-       status = "okay";
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster6 {
-       status = "okay";
-
-       mbox_m4_0: mbox-m4-0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
-       status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
-       status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
-       status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
-       status = "reserved";
-};
-
-&main_r5fss0 {
-       status = "okay";
-};
-
 &main_i2c0 {
        pinctrl-names = "default";
        pinctrl-0 = <&main_i2c0_pins_default>;
@@ -373,49 +258,6 @@
        bootph-all;
 };
 
-&main_r5fss0 {
-       status = "okay";
-};
-
-&main_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       status = "okay";
-};
-
-&main_r5fss1_core0 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1_core1 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-       status = "okay";
-};
-
-&mcu_m4fss {
-       mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
-       memory-region = <&mcu_m4fss_dma_memory_region>,
-                       <&mcu_m4fss_memory_region>;
-       status = "okay";
-};
-
 &ospi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&ospi0_pins_default>;
@@ -451,3 +293,5 @@
                ti,adc-channels = <0 1 2 3 4 5 6 7>;
        };
 };
+
+#include "k3-am64-ti-ipc-firmware.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi
new file mode 100644 (file)
index 0000000..6b10646
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on AM64 SoCs
+ *
+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+       main_r5fss0_core1_dma_memory_region: memory@a1000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa1000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss0_core1_memory_region: memory@a1100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa1100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss1_core0_dma_memory_region: memory@a2000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa2000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss1_core0_memory_region: memory@a2100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa2100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss1_core1_dma_memory_region: memory@a3000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa3000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss1_core1_memory_region: memory@a3100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa3100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       mcu_m4fss_dma_memory_region: memory@a4000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa4000000 0x00 0x100000>;
+               no-map;
+       };
+
+       mcu_m4fss_memory_region: memory@a4100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa4100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       rtos_ipc_memory_region: memory@a5000000 {
+               reg = <0x00 0xa5000000 0x00 0x00800000>;
+               alignment = <0x1000>;
+               no-map;
+       };
+};
+
+&mailbox0_cluster2 {
+       status = "okay";
+
+       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+               ti,mbox-rx = <0 0 2>;
+               ti,mbox-tx = <1 0 2>;
+       };
+
+       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+               ti,mbox-rx = <2 0 2>;
+               ti,mbox-tx = <3 0 2>;
+       };
+};
+
+&mailbox0_cluster4 {
+       status = "okay";
+
+       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+               ti,mbox-rx = <0 0 2>;
+               ti,mbox-tx = <1 0 2>;
+       };
+
+       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+               ti,mbox-rx = <2 0 2>;
+               ti,mbox-tx = <3 0 2>;
+       };
+};
+
+&mailbox0_cluster6 {
+       status = "okay";
+
+       mbox_m4_0: mbox-m4-0 {
+               ti,mbox-rx = <0 0 2>;
+               ti,mbox-tx = <1 0 2>;
+       };
+};
+
+/* main_timer8 is used by r5f0-0 */
+&main_timer8 {
+       status = "reserved";
+};
+
+/* main_timer9 is used by r5f0-1 */
+&main_timer9 {
+       status = "reserved";
+};
+
+/* main_timer10 is used by r5f1-0 */
+&main_timer10 {
+       status = "reserved";
+};
+
+/* main_timer11 is used by r5f1-1 */
+&main_timer11 {
+       status = "reserved";
+};
+
+&main_r5fss0 {
+       status = "okay";
+};
+
+&main_r5fss0_core0 {
+       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
+       memory-region = <&main_r5fss0_core0_dma_memory_region>,
+                       <&main_r5fss0_core0_memory_region>;
+       status = "okay";
+};
+
+&main_r5fss0_core1 {
+       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
+       memory-region = <&main_r5fss0_core1_dma_memory_region>,
+                       <&main_r5fss0_core1_memory_region>;
+       status = "okay";
+};
+
+&main_r5fss1 {
+       status = "okay";
+};
+
+&main_r5fss1_core0 {
+       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
+       memory-region = <&main_r5fss1_core0_dma_memory_region>,
+                       <&main_r5fss1_core0_memory_region>;
+       status = "okay";
+};
+
+&main_r5fss1_core1 {
+       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
+       memory-region = <&main_r5fss1_core1_dma_memory_region>,
+                       <&main_r5fss1_core1_memory_region>;
+       status = "okay";
+};
+
+&mcu_m4fss {
+       mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
+       memory-region = <&mcu_m4fss_dma_memory_region>,
+                       <&mcu_m4fss_memory_region>;
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index ebc9fedc4d7206b8ebdd74ba0834942fe5080890..85dcff1049360b8a73f99edbc37e8d79eea5998e 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -64,60 +64,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               main_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               mcu_m4fss_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_m4fss_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@a5000000 {
-                       reg = <0x00 0xa5000000 0x00 0x00800000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 
        evm_12v0: regulator-0 {
@@ -727,106 +673,6 @@
        };
 };
 
-&mailbox0_cluster2 {
-       status = "okay";
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster6 {
-       status = "okay";
-
-       mbox_m4_0: mbox-m4-0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-};
-
-&main_r5fss0 {
-       status = "okay";
-};
-
-&main_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       status = "okay";
-};
-
-&main_r5fss1_core0 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1_core1 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-       status = "okay";
-};
-
-&mcu_m4fss {
-       mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
-       memory-region = <&mcu_m4fss_dma_memory_region>,
-                       <&mcu_m4fss_memory_region>;
-       status = "okay";
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
-       status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
-       status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
-       status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
-       status = "reserved";
-};
-
 &serdes_ln_ctrl {
        idle-states = <AM64_SERDES0_LANE0_PCIE0>;
 };
@@ -890,3 +736,5 @@
        pinctrl-names = "default";
        pinctrl-0 = <&icssg1_iep0_pins_default>;
 };
+
+#include "k3-am64-ti-ipc-firmware.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index d2b06e508c7f2164aeec2a5a7709e87dce5d15ca..1fb1b91a1badbfe4c3d684c701806ade90eb66e9 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -62,60 +62,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               main_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               mcu_m4fss_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_m4fss_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@a5000000 {
-                       reg = <0x00 0xa5000000 0x00 0x00800000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 
        vusb_main: regulator-0 {
@@ -642,106 +588,6 @@
        };
 };
 
-&mailbox0_cluster2 {
-       status = "okay";
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster6 {
-       status = "okay";
-
-       mbox_m4_0: mbox-m4-0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-};
-
-&main_r5fss0 {
-       status = "okay";
-};
-
-&main_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       status = "okay";
-};
-
-&main_r5fss1_core0 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1_core1 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-       status = "okay";
-};
-
-&mcu_m4fss {
-       mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
-       memory-region = <&mcu_m4fss_dma_memory_region>,
-                       <&mcu_m4fss_memory_region>;
-       status = "okay";
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
-       status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
-       status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
-       status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
-       status = "reserved";
-};
-
 &ecap0 {
        status = "okay";
        /* PWM is available on Pin 1 of header J3 */
@@ -755,3 +601,5 @@
        pinctrl-names = "default";
        pinctrl-0 = <&main_eqep0_pins_default>;
 };
+
+#include "k3-am64-ti-ipc-firmware.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
index 38feda717d7a5a3f6e7018914e809d455ec77f4f..fcbcc04521b891beedddcda0431e8c65418e4eea 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
@@ -126,60 +126,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               main_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               mcu_m4fss_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_m4fss_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@a5000000 {
-                       reg = <0x00 0xa5000000 0x00 0x00800000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 
        vdd_mmc0: regulator-vdd-mmc0 {
@@ -281,63 +227,6 @@
        };
 };
 
-&mailbox0_cluster2 {
-       status = "okay";
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster6 {
-       status = "okay";
-
-       mbox_m4_0: mbox-m4-0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
-       status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
-       status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
-       status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
-       status = "reserved";
-};
-
 &main_i2c0 {
        pinctrl-names = "default";
        pinctrl-0 = <&main_i2c0_default_pins>;
@@ -535,49 +424,6 @@
        };
 };
 
-&main_r5fss0 {
-       status = "okay";
-};
-
-&main_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       status = "okay";
-};
-
-&main_r5fss1_core0 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1_core1 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-       status = "okay";
-};
-
-&mcu_m4fss {
-       mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
-       memory-region = <&mcu_m4fss_dma_memory_region>,
-                       <&mcu_m4fss_memory_region>;
-       status = "okay";
-};
-
 /* SoC default UART console */
 &main_uart0 {
        pinctrl-names = "default";
@@ -656,3 +502,5 @@
        ti,vbus-divider;
        ti,usb2-only;
 };
+
+#include "k3-am64-ti-ipc-firmware.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
index f6d1e980d32f39f77bb81c6fd2c5c63f05bbeec2..ff3b2e0b8dd45bf775d31bba2c6942275fcac81f 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
@@ -42,60 +42,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               main_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               mcu_m4fss_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_m4fss_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               rtos_ipc_memory_region: memory@a5000000 {
-                       reg = <0x00 0xa5000000 0x00 0x00800000>;
-                       alignment = <0x1000>;
-                       no-map;
-               };
        };
 
        reg_1v8: regulator-1v8 {
@@ -142,106 +88,6 @@
        };
 };
 
-&mailbox0_cluster2 {
-       status = "okay";
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 2>;
-               ti,mbox-tx = <3 0 2>;
-       };
-};
-
-&mailbox0_cluster6 {
-       status = "okay";
-
-       mbox_m4_0: mbox-m4-0 {
-               ti,mbox-rx = <0 0 2>;
-               ti,mbox-tx = <1 0 2>;
-       };
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
-       status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
-       status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
-       status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
-       status = "reserved";
-};
-
-&main_r5fss0 {
-       status = "okay";
-};
-
-&main_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       status = "okay";
-};
-
-&main_r5fss1_core0 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1_core1 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-       status = "okay";
-};
-
-&mcu_m4fss {
-       mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
-       memory-region = <&mcu_m4fss_dma_memory_region>,
-                       <&mcu_m4fss_memory_region>;
-       status = "okay";
-};
-
 &ospi0 {
        status = "okay";
        pinctrl-names = "default";
@@ -315,3 +161,5 @@
                >;
        };
 };
+
+#include "k3-am64-ti-ipc-firmware.dtsi"